Parallel Sync and Bit Decoding for Serial Bus Anomaly Tolerance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed multipoint serial buses face challenges with signal anomalies such as ringing, impedance mismatches, and capacitive bunching, which existing decoders struggle to tolerate, leading to unreliable message detection and limited performance.
Innovation Solution
A robust message decoder is implemented, comprising a sync pattern decoder and a message bit decoder operating in parallel, which continuously searches for and identifies properly formatted sync patterns to abort false message decoding and initiate true message decoding, thereby tolerating bus anomalies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single message decoder is used to decode both sync patterns and message bits sequentially, then the decoder structure is simple, but the decoding speed is limited and cannot tolerate bus anomalies effectively
Solution Approach 1:
The message decoder is divided into two parallel components: a sync pattern decoder that continuously monitors for sync patterns, and a message bit decoder that decodes message bits. This segmentation allows simultaneous operation on different data streams, increasing overall decoding speed while maintaining manageable complexity through functional separation.
Solution Approach 2:
The sync pattern decoder operates continuously in advance to detect sync patterns before the message bit decoder needs to process the corresponding message bits. This preliminary detection enables the message bit decoder to be activated at the optimal time, maximizing decoding throughput and allowing the system to tolerate bus anomalies by preparing ahead of time.
2Reliability
If weak differential voltage bias is added to keep receivers out of hysteresis range, then receiver stability improves, but false message decoding cannot be prevented and random data patterns still activate the decoder
Solution Approach 1:
The sync pattern decoder provides feedback to the message bit decoder by signaling when a valid sync pattern has been detected. This feedback mechanism ensures that the message bit decoder only activates when a legitimate message is present, preventing false activation by random data patterns while maintaining receiver stability through the continuous operation of the sync pattern decoder.
Solution Approach 2:
The sync pattern decoder acts as an intermediary between the bus signal and the message bit decoder. It filters and validates incoming signals before they reach the message bit decoder, blocking false activations from random data patterns while allowing legitimate messages to pass through for decoding.
3Measurement precision
If the decoder waits for complete message formatting before decoding, then decoding accuracy improves, but the system cannot tolerate bus anomalies like ringing that occur during signal transitions
Solution Approach 1:
The sync pattern decoder performs preliminary detection of sync patterns and validates message formatting in advance, before the message bit decoder begins decoding. This preliminary validation ensures decoding accuracy by confirming proper formatting, while the continuous monitoring capability allows the system to detect and tolerate bus anomalies like ringing that occur during signal transitions.
Solution Approach 2:
The sync pattern decoder operates continuously without interruption, providing constant monitoring and validation of incoming signals. This continuous operation maintains decoding accuracy through ongoing validation while simultaneously providing anomaly tolerance by detecting and adapting to signal conditions in real-time, including ringing and other bus anomalies.
Data Source
AI summary
A data message decoder for high-speed serial bus applications includes a sync pattern decoder that is operated in parallel and simultaneously with a message bit decoder. By operating the sync pattern decoder and the message bit decoder in parallel and simultaneously a true sync pattern following a valid looking sync pattern may be identified and the decoding of the bit message following the valid looking sync pattern may be aborted once the true sync pattern is detected. The data message decoder is robust and tolerant of bus anomalies that are typical when using high frequency signaling on a multipoint serial bus. The robust data message decoder is suitable for, but not limited to, applications in the aerospace industry, such as onboard network systems for advanced commercial and military aircraft.