Parallel Hardware TCP/IP Offload Engine for Packet Processing

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Solution Overview

Problem

Current TCP/IP processing in communication systems is inefficient due to increased network bandwidth and video content transmission, leading to insufficient CPU performance, and existing TOE solutions do not effectively execute TCP/UDP transmission processing in parallel.

Innovation Solution

A communication apparatus with hardware modules that perform connection information reading, header generation, and data reading in parallel, allowing simultaneous processing of packet transmission tasks to improve processing speed and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If TCP/IP processing is performed by software processing using CPU, then implementation flexibility is maintained, but processing speed becomes insufficient due to increased network bandwidth and video content transmission

Engineering Contradiction:
Improveprocessing speedVSAvoidCPU performance
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent replaces software-based TCP/IP processing with hardware-based processing using a TOE (TCP/IP Offload Engine). This substitution of mechanical/system approach transforms the CPU software processing into dedicated hardware modules that perform TCP/IP protocol processing in parallel, thereby achieving higher processing speeds and resolving the insufficiency of CPU performance handling increased network bandwidth and video content transmission.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The TOE is divided into multiple sub-processors (sub-processor A through sub-processor E) that perform different TCP/IP processing tasks in parallel. Each sub-processor handles specific functions such as socket API processing, TCP/UDP reception processing, TCP/UDP transmission processing, MAC driver and IP reception processing, and MAC driver and IP transmission processing. This segmentation enables parallel processing of multiple packet operations simultaneously, dramatically improving processing speed.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple sub-processors are used for parallel TCP processing, then processing capacity increases, but the method for performing TCP/UDP transmission processing in parallel remains unspecified

Engineering Contradiction:
Improveparallel processing capacityVSAvoidtransmission processing structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The transmission processing function is segmented into three distinct sub-processors: sub-processor A for socket API processing, sub-processor C for TCP/UDP transmission processing, and sub-processor E for MAC driver and IP transmission processing. This segmentation allows each sub-processor to handle specific transmission tasks independently and in parallel, providing a concrete implementation method for parallel transmission processing while managing device complexity through functional specialization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by having sub-processor A perform socket API processing and prepare transmission data before sub-processor C performs actual TCP/UDP transmission processing. This staged approach allows transmission processing to be broken down into preparatory steps that can be executed in parallel with other operations, enabling efficient parallel transmission processing.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If TCP transmission processing is performed sequentially through multiple processes, then processing accuracy is maintained, but processing time increases due to sequential execution of reading connection information, writing data, generating headers, and updating connection information

Engineering Contradiction:
Improveprocessing timeVSAvoidprocessing simplicity
Core Design Contradiction:
Loss of timeVSEase of operation

Solution Approach 1:

The sequential transmission processing steps are segmented and assigned to different sub-processors that execute in parallel. Sub-processor A handles socket API processing including reading connection information, sub-processor C handles TCP/UDP transmission processing including header generation, and sub-processor E handles MAC driver and IP transmission processing including data writing and updating connection information. This segmentation enables simultaneous execution of these previously sequential operations, dramatically reducing processing time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent achieves continuity of useful action by ensuring that while one sub-processor is processing data for one connection, other sub-processors simultaneously process data for different connections. This parallel continuous processing eliminates idle time between operations and maintains constant processing throughput across multiple connections, reducing overall processing time while maintaining processing accuracy through dedicated hardware modules.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9025593B2Communication apparatus
Publication Date: 2015.05.05 KK TOSHIBA
  • US9025593B2 patent drawing
  • US9025593B2 patent drawing
  • US9025593B2 patent drawing

AI summary

One embodiment provides a communication apparatus including: a first storage which stores connection information and an address; a connection information reading portion which reads connection information from the first storage upon reception of a packet transmission start instruction; a header generating portion which generates a header of a packet from the read connection information; a second storage which stores data at the address; and a data reading portion which reads data corresponding to the read connection information from the second storage, wherein the connection information reading portion is constituted by a first hardware, wherein the header generating and data reading portions are constituted by a second hardware, and wherein, while the data reading portion is reading data of a first packet or while the header generating portion is generating a header of the first packet, the connection information reading portion reads connection information of a second packet.