Parallel TCP/IP Data Reception Hardware Architecture

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Solution Overview

Problem

Conventional CPU processing is insufficient for handling increasing network processing loads due to wider bandwidths and increased video content transmission, particularly in TCP/IP protocol processing, where parallelization of TCP/UDP reception processing is not effectively described in existing TOE implementations.

Innovation Solution

A data receiving apparatus and method that includes a network interface, header analyzing unit, checksum judging unit, buffer units, and write/location identifying units to efficiently process received frames by analyzing headers, calculating checksums, and writing data to storage while parallelizing operations, ensuring correct ordering and error handling through connection information management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional CPU software processing is used for TCP/IP protocol processing, then implementation flexibility is maintained, but processing speed becomes insufficient for increasing network loads

Engineering Contradiction:
Improveprocessing speedVSAvoidnetwork processing capacity
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent replaces the mechanical CPU software processing system with a dedicated TOE hardware subsystem. The TOE includes specialized reception processing units and transmission processing units that operate in parallel, substituting the sequential CPU software execution with hardware-accelerated parallel processing specifically designed for TCP/IP protocol operations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent segments the TCP/IP processing into distinct reception processing and transmission processing functions. The reception processing unit handles incoming packets while the transmission processing unit handles outgoing packets independently. This segmentation allows both units to operate simultaneously without interfering with each other, thereby increasing overall processing capacity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a single subprocessor performs TCP/UDP reception processing, then implementation is simplified, but parallelization of reception processing is not achieved

Engineering Contradiction:
Improvereception processing throughputVSAvoidreception processing structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The reception processing function is segmented into multiple reception processing units (first reception processing unit and second reception processing unit). Each unit can independently process different TCP/UDP packets simultaneously. This segmentation enables parallel reception processing without requiring a single complex subprocessor, thereby increasing throughput while maintaining manageable complexity.

Inventive Principle:
Principle #1Segmentation

3Productivity

If TCP/UDP reception processing is not parallelized, then implementation complexity is reduced, but processing efficiency cannot meet high-bandwidth network requirements

Engineering Contradiction:
Improvedata reception efficiencyVSAvoidprocessing architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processing architecture is segmented into multiple independent reception processing units that can operate in parallel. Each unit has its own processing pipeline for reading connection information, writing frame data, and updating connection information. This segmentation achieves parallelization for high-efficiency data reception while keeping each individual unit relatively simple in structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8924836B2Data receiving apparatus, data receiving method, and computer-readable recording medium
Publication Date: 2014.12.30 KK TOSHIBA
  • US8924836B2 patent drawing
  • US8924836B2 patent drawing
  • US8924836B2 patent drawing

AI summary

A data receiving apparatus includes: a header analyzing unit that analyzes a header of a frame and outputs header information; a checksum judging unit that calculates and judges a checksum of the frame; a buffer unit that stores a data portion of the frame; a reading unit that reads connection information corresponding to the header information from a second storage unit; an identifying unit that identifies a write location for the data portion based on the connection information; a data writing unit that reads data from the buffer unit and starts writing the data to the identified write location in a first storage unit before the checksum is judged; and a writing unit that, if the judgment result is “pass,” writes the connection information updated based on the header information to the second storage unit while the data writing unit is writing.