Parallel Texture Decoders with Unique Circuitry for ETC2 PLANAR Mode
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Solution Overview
Problem
Current texture compression systems, such as ETC2, face increased complexity when implementing the PLANAR-mode, which requires complex hardware circuitry, and existing decoding systems with identical parallel decoders are inefficient, particularly for handling texel blocks with uneven distributions and smooth color transitions.
Innovation Solution
A decoding system with N parallel decoders, each having unique circuitry, allows for selective output of texel values based on texel positions within a texel block, reducing overall complexity by limiting some decoders to handle only specific texel positions, thereby enabling efficient hardware implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If complex hardware circuitry is used to implement PLANAR-mode in ETC2 decoder, then decoding capability for smooth color transitions is improved, but device complexity increases significantly
Solution Approach 1:
The patent divides the decoding system into multiple parallel decoders (first decoder, second decoder, third decoder, fourth decoder), each responsible for specific texel positions within a texel block. This segmentation allows each decoder to have simplified circuitry tailored to its specific function, avoiding the need for all decoders to implement the full complex PLANAR-mode circuitry.
Solution Approach 2:
Each decoder is designed with different circuitry complexity matched to its specific decoding requirements. For example, the first decoder handles texels at specific positions and uses circuitry optimized for those positions, while other decoders handle different positions with appropriately scaled circuitry. This local optimization reduces overall system complexity while maintaining full decoding capability.
2Device complexity
If identical parallel decoders are used in decoding system, then hardware implementation is simplified, but processing efficiency for varying texel positions deteriorates
Solution Approach 1:
The patent implements different circuitry in different decoders based on the specific texel positions they handle. For instance, the first decoder has circuitry optimized for decoding texels at certain positions, while the second, third, and fourth decoders have different circuitry for their respective positions. This differentiation improves processing efficiency by avoiding unnecessary circuit operations in decoders that don't handle certain texel positions.
Solution Approach 2:
Each decoder implements only the necessary decoding functionality for its assigned texel positions, rather than implementing the complete decoding algorithm for all possible positions. This partial implementation approach maintains processing efficiency for the intended use case while reducing overall hardware complexity.
Data Source
Figure 1A~1D
Figure 2
Figure 3~5
AI summary
A decoding system (1) comprises N different decoders (100, 200, 300, 400) each having a unique circuitry that is different from the circuitries of the other N-1 decoders. The decoders (100, 200, 300, 400) each generate at least one texel value based on an input encoded texel block (40). A value selector (500) is configured to selectively output at least N texel values from at least one of the decoders (100, 200, 300, 400) based on the position of the at least N texels (30-36) relative a boundary of a texel block (10) comprising at least one of the at least N texels (30-36). A pixel calculator (600) calculates a pixel value of a decoded pixel based on the at least N selected texel values from the value selector (500).