Parallel Tile Synchronization for Lithography Boundary Accuracy

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Solution Overview

Problem

Conventional parallel computing solutions for large area lithography simulation face inefficiencies due to tile boundary inconsistencies, which arise from limited information exchange between neighboring tiles, leading to suboptimal simulation area efficiency and accuracy, especially at advanced technology nodes like 5 nm and beyond.

Innovation Solution

A synchronized parallel computing architecture where a manager machine oversees overall algorithms, and multiple worker machines exchange intermediate results to synchronize simulation steps, preventing tile boundary inconsistencies by treating the integrated circuit design layout as a whole and using an underlying tiling scheme to smoothly combine results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional parallel computing solutions divide the lithography simulation area into tiles for distributed processing, then productivity is improved through parallel computation, but tile boundary inconsistencies arise due to limited information exchange between neighboring tiles

Engineering Contradiction:

Improvesimulation computation speedVSAvoidsimulation accuracy at tile boundaries

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where intermediate computation results from each tile are exchanged with neighboring tiles through a manager machine. This feedback loop allows each tile to incorporate boundary information from adjacent tiles, ensuring consistency across tile boundaries while maintaining parallel computation efficiency.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The manager machine serves as an intermediary between worker machines processing different tiles. It collects intermediate results from each tile, performs synchronization and consistency checks, and distributes updated boundary information back to the appropriate tiles, thereby resolving boundary inconsistencies without sacrificing parallel processing benefits.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If the simulation area is divided into multiple tiles for parallel processing, then productivity increases through distributed computation, but device complexity increases due to the need for coordination between worker machines and manager machine

Engineering Contradiction:

Improveparallel processing efficiencyVSAvoidsystem coordination complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The system is segmented into distinct functional components: worker machines that handle tile-specific computations and a manager machine that handles coordination. This segmentation allows each component to specialize in its function, reducing the complexity burden on individual machines while enabling scalable parallel processing.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The manager machine performs multiple functions including collecting intermediate results, synchronizing tile boundaries, managing data exchange, and coordinating worker machines. This multi-functionality consolidates coordination complexity into a single component, allowing worker machines to focus solely on computation and simplifying the overall system architecture.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Manufacturing precision

If intermediate results are exchanged between neighboring tiles to prevent boundary inconsistencies, then manufacturing precision is improved, but loss of time increases due to additional communication and synchronization steps

Engineering Contradiction:

Improvelithography pattern accuracyVSAvoidsynchronization overhead time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The system performs preliminary exchanges of intermediate results during the computation process rather than waiting until the end. By synchronizing boundary information incrementally as computations progress, the system prevents boundary inconsistencies from developing in the first place, reducing the need for costly post-processing corrections and minimizing total synchronization time.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11340584B2Synchronized parallel tile computation for large area lithography simulation

Publication Date: 2022.05.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Examples of synchronized parallel tile computation techniques for large area lithography simulation are disclosed herein for solving tile boundary issues. An exemplary method for integrated circuit (IC) fabrication comprises receiving an IC design layout, partitioning the IC design layout into a plurality of tiles, performing a simulated imaging process on the plurality of tiles, generating a modified IC design layout by combining final synchronized image values from the plurality of tiles, and providing the modified IC design layout for fabricating a mask. Performing the simulated imaging process comprises executing a plurality of imaging steps on each of the plurality of tiles. Executing each of the plurality of imaging steps comprises synchronizing image values from the plurality of tiles via data exchange between neighboring tiles.