Parallel Transistor Turn-On Delay via Peak Current Comparison
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Solution Overview
Problem
In power stages with parallel-coupled transistors, uneven turn-on times lead to increased safe operating area stress on one transistor, causing faster degradation due to higher in-rush currents, which existing techniques fail to adequately address.
Innovation Solution
The system includes a pulse width modulation generator and switch timing controllers that compare peak currents of parallel transistors, adjusting the turn-on time of the transistor with the higher peak current to match the others, thereby reducing initial peak current and stress through delayed PWM signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If parallel-coupled transistors are controlled with simultaneous PWM signals, then the control simplicity is maintained, but uneven turn-on times cause increased safe operating area stress and higher in-rush currents on individual transistors
Solution Approach 1:
The system performs preliminary measurement of peak current for each transistor before the main switching operation. Based on these measurements, delay values are pre-calculated and applied to individual PWM signals, ensuring that transistors turn on simultaneously despite manufacturing variations. This preliminary characterization eliminates the need for complex real-time synchronization while maintaining reliability.
Solution Approach 2:
The patent applies individualized delay values to each transistor based on its specific peak current characteristics. Rather than using a uniform control approach, each transistor receives a customized PWM signal with a specific delay parameter, allowing optimal turn-on synchronization for each device while maintaining overall system simplicity.
2Device complexity
If transistors with different peak currents are operated without delay adjustment, then device complexity is minimized, but the transistor with higher peak current experiences faster degradation
Solution Approach 1:
The system performs preliminary measurement of peak current for each transistor before the main switching operation. Based on these measurements, delay values are pre-calculated and applied to individual PWM signals, ensuring that transistors turn on simultaneously despite manufacturing variations. This preliminary characterization eliminates the need for complex real-time synchronization while maintaining reliability.
Solution Approach 2:
The patent modifies the timing parameter of PWM signals individually for each transistor based on measured peak current characteristics. By changing the delay parameter rather than the fundamental switching waveform, the system extends transistor lifespan without requiring complex circuit architecture or real-time adaptive control.
3Reliability
If individual delay control is implemented for each transistor, then turn-on synchronization is achieved, but the control system complexity increases
Solution Approach 1:
The system performs preliminary measurement of peak current for each transistor before the main switching operation. Based on these measurements, delay values are pre-calculated and applied to individual PWM signals, ensuring that transistors turn on simultaneously despite manufacturing variations. This preliminary characterization eliminates the need for complex real-time synchronization while maintaining reliability.
Solution Approach 2:
The patent uses a template-based approach where a standard PWM waveform is copied and applied to all transistors, with only the delay parameter being individually adjusted. This copying strategy maintains signal integrity and simplifies control logic, as the same basic waveform structure is reused across all devices with minimal parameter variation.
Data Source
AI summary
Methods, apparatus, systems and articles of manufacture are disclosed to control parallel transistors. An example system includes a first transistor coupled in parallel to a second transistor, a pulse width modulation generator coupled to the first transistor. The pulse width modulation generator is to generate a first signal. The example system further includes a first switch timing controller coupled to the pulse width modulation generator. The first switch timing controller is to compare a first peak current of the first transistor with a second peak current and generate a second signal based on the comparison of the first peak current and the second peak current. The example system further includes a gate driver coupled to the first switch timing controller and the gate driver is to control the first transistor in response to the second signal.