Parallel Power Transistor Circuit for Low-Current Wafer Testing

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Solution Overview

Problem

Existing electronic circuit testing methods are limited by the inability to perform effective tests on power transistors during manufacturing due to the high currents required, which often damage probes and necessitate end-of-manufacturing testing, leading to increased production costs and inefficiencies.

Innovation Solution

A circuit design featuring multiple elementary transistors connected in parallel with control circuits that allow for controlled voltage supply to the transistors, enabling tests to be performed during manufacturing by isolating current flow through specific assemblies, thereby reducing the current required for testing and preventing probe damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high current is applied to test power transistors during manufacturing, then test effectiveness is improved, but probe damage occurs and testing cannot be performed during manufacturing

Engineering Contradiction:
Improvetest effectivenessVSAvoidprobe damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The power transistor is segmented into multiple elementary transistors connected in parallel. By controlling individual groups of these elementary transistors through separate control circuits, the total test current can be distributed and reduced to safe levels for probes while still effectively testing the overall device functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit employs dynamic control through switches that can selectively connect or disconnect different groups of elementary transistors. This allows the circuit to operate in different configurations during manufacturing testing, enabling low-current tests on specific subsets while protecting probes from damage.

Inventive Principle:
Principle #15Dynamics

2Reliability

If all elementary transistors are tested simultaneously with full current, then comprehensive testing is achieved, but production costs increase due to end-of-manufacturing testing requirements

Engineering Contradiction:
Improvetesting completenessVSAvoidproduction efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By dividing the power transistor into multiple controllable groups of elementary transistors, comprehensive testing can be performed in stages during manufacturing. This eliminates the need for separate end-of-manufacturing tests, improving productivity while maintaining testing completeness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit enables preliminary testing of individual transistor groups during the manufacturing process itself. By performing tests on subsets of elementary transistors at intermediate stages, the need for final comprehensive testing after assembly is reduced or eliminated.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If multiple assemblies of elementary transistors are controlled by separate circuits, then current distribution is improved for safe testing, but circuit complexity increases

Engineering Contradiction:
Improvecurrent control precisionVSAvoidcontrol circuit complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The control circuit is segmented into multiple independent control paths, each managing a group of elementary transistors. This segmentation provides precise current control for each group while keeping individual control circuits relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control circuits are designed to be universal and interchangeable, with each control circuit capable of managing a group of elementary transistors in the same manner. This multi-functionality reduces overall complexity by using standardized control blocks rather than custom circuits for each transistor.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10819330B2Electronic circuit
Publication Date: 2020.10.27 STMICROELECTRONICS (ROUSSET) SAS
  • US10819330B2 patent drawing
  • US10819330B2 patent drawing

AI summary

In one embodiment, a circuit includes a plurality of elementary transistors connected in parallel between a node of application of a first potential of a power supply voltage and a node for coupling a load. The plurality of transistors includes a first assembly of elementary transistors having their gates coupled to a control node by a first circuit and a second assembly of elementary transistors having their gates coupled to the control node by a second circuit. The second circuit has two states, where the first and second circuits are configured to supply a substantially identical control voltage to the gates of the first and second assemblies of elementary transistors when the second circuit is in one of the two states.