Parallel Video Decoding Using Layered Pipeline Architecture
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Solution Overview
Problem
Most personal computers lack the computational capability to decode high-density video data compressed using high compression ratio schemes like H.264, such as those found on Blu-ray discs, due to inefficient use of modern processor parallelism and the need for additional decoding hardware.
Innovation Solution
A layered decoding method that processes entire frames or multiple frames in parallel, optimizing graphics processing hardware by pre-processing encoded data to allow parallel processing across multiple pipelines, minimizing CPU usage and leveraging SIMD architecture for efficient video decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional sequential decoding is used for H.264 compressed video data, then decoding accuracy is maintained, but processing speed is too slow for real-time playback on standard PCs
Solution Approach 1:
The patent segments the video decoding process into multiple independent pipelines, each handling specific macro blocks or processing stages. This allows parallel execution of multiple decoding operations simultaneously, dramatically increasing throughput without requiring a single complex decoder. The segmentation enables standard PCs to achieve real-time decoding by distributing work across multiple simpler processing units.
Solution Approach 2:
The patent introduces parallelism across multiple processing dimensions - spatial parallelism through multiple pipelines processing different macro blocks simultaneously, and temporal parallelism through overlapping of decoding stages. This multi-dimensional parallelism transforms the single-threaded sequential process into a massively parallel operation, achieving real-time performance on standard hardware.
2Productivity
If multiple processing pipelines are introduced to increase decoding speed, then productivity improves, but data dependencies between macro blocks must be managed carefully
Solution Approach 1:
The patent performs preliminary reorganization of encoded data into a format that exposes parallelism and minimizes dependencies before parallel processing begins. By pre-processing the bitstream to arrange macro blocks and their dependencies in a parallel-friendly structure, the system enables pipelines to operate independently with minimal synchronization, reducing the complexity of managing data dependencies while maintaining high throughput.
3Adaptability or versatility
If dedicated decoding hardware is added to enable high-density media playback, then compatibility with H.264 format is achieved, but system complexity and cost increase
Solution Approach 1:
The patent designs the parallel processing architecture to be universal, using the same multi-pipeline structure for both video decoding and graphics rendering operations. By making the hardware multi-functional, the system achieves H.264 decoding capability without adding dedicated decoding hardware, as the existing GPU architecture can be configured to perform both functions efficiently.
Solution Approach 2:
The patent enables standard PC graphics processing units to decode H.264 video by themselves using their existing parallel processing capabilities, without requiring external dedicated decoding hardware or assistance from other components. The GPU's inherent parallel architecture is self-sufficient for decoding tasks when properly programmed, eliminating the need for additional hardware devices.
Data Source
AI summary
Embodiments of a method and system for decoding video data are described herein. In various embodiments, a high-compression-ratio codec (such as H.264) is part of the encoding scheme for the video data. Embodiments pre-process control maps that were generated from encoded video data, and generating intermediate control maps comprising information regarding decoding the video data. The control maps include information regarding rearranging the video data to be processed in parallel on multiple pipelines of a graphics processing unit (GPU) so as to optimize the use of the multiple pipelines. In an embodiment, decoding is performed on a frame basis such that each of multiple, distinct decoding operations is performed on an entire frame at one time. In other embodiments, processing of different frames is interleaved. Embodiments increase the efficiency of the decoding such as to allow decoding of high-compression-ratio encoded video data on personal computers or comparable equipment without special, additional decoding hardware.