Parallel Video Interpolation Filter Using Split Coefficients
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing video interpolation filters are resource-intensive and increase the complexity, cost, and power consumption of electronic video apparatuses due to the need for SIMD instructions and additional circuitry, which are not suitable for all micro-processors, especially those without SIMD instructions.
Innovation Solution
A method of parallelly filtering input data words containing packed input data pixels by separating interpolation filter coefficients into positive and negative sets, performing multiplication, accumulation, and logical operations to obtain final output data words containing packed half-pel pixels, without occupying valuable instruction bit space or increasing circuitry complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If SIMD instructions and additional circuitry are used in video interpolation filters, then filtering speed and decoding efficiency are improved, but device complexity, cost, and power consumption increase
Solution Approach 1:
The patent replaces specialized hardware circuitry with software-based SIMD instructions that can be executed on general-purpose microprocessors. The interpolation filter is implemented as a software algorithm using parallel processing capabilities already present in modern CPUs, eliminating the need for dedicated hardware circuits while maintaining high filtering speed.
Solution Approach 2:
The patent creates a universal interpolation filter implementation that works on any microprocessor with SIMD capabilities, rather than requiring specialized hardware. The same software code can be deployed across different processor architectures, providing both hardware complexity reduction and broad adaptability.
2Loss of time
If SIMD instructions are used in video interpolation filters, then decoding cycles are reduced, but instruction bit space is occupied and microprocessor compatibility is reduced
Solution Approach 1:
The patent substitutes hardware-based parallel processing with software-based SIMD instructions that leverage the parallel processing capabilities already built into modern microprocessors. This approach reduces decoding cycles while maintaining compatibility with any microprocessor that supports standard SIMD instruction sets.
Solution Approach 2:
The patent uses software code (a copy of the filtering algorithm) that can be executed on any compatible microprocessor, rather than relying on specialized hardware circuits. This software copy can be deployed universally across different processor platforms, maintaining both speed and compatibility.
3Reliability
If additional circuitry is added to electronic video apparatuses for interpolation filtering, then filtering performance is improved, but cost and power consumption increase
Solution Approach 1:
The patent replaces power-hungry dedicated hardware circuits with software-based filtering that executes on the microprocessor's existing execution units. This substitution maintains filtering performance while significantly reducing power consumption by utilizing already-powered processing resources.
Solution Approach 2:
The patent enables the microprocessor to perform interpolation filtering using its own existing SIMD execution units, rather than requiring separate dedicated circuits. The processor serves its own filtering needs using its built-in parallel processing capabilities, eliminating the need for additional power-consuming hardware.
Data Source
AI summary
The present invention is to provide a parallel filtering method, which is implemented to an interpolation filter and comprises the steps of separating coefficients of the interpolation filter into two sets comprising the positive and negative coefficients respectively for parallelly filtering a plurality of input data pixels packed into data words inputted to the interpolation filter concurrently to obtain a first result data word, and clipping and shifting the first result data word to obtain a final output data word containing packed half-pel pixels for parallelly and efficiently filtering data stream of video without increasing the complexity, cost, size and power consumption of circuitry of an electronic video apparatus.