Parallel Video Decoding with Sub-Picture Workload Balancing

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Solution Overview

Problem

Existing video coding standards like HEVC do not effectively balance pixel rates across multiple processing cores, leading to inefficient workload distribution and sub-optimal throughput in multi-core video encoding and decoding systems.

Innovation Solution

The method involves dividing a video picture into independently decodable sub-pictures, which are allocated to multiple processing cores for balanced pixel rate distribution, using constraints specified by the video coding standard to ensure equal loading and minimize hardware costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If video pictures are processed using single-core sequential processing, then implementation is simpler, but throughput is insufficient for high-resolution video encoding/decoding

Engineering Contradiction:
ImprovethroughputVSAvoidprocessing architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The video picture is divided into multiple independently decodable sub-pictures, which are then distributed to multiple processing cores for parallel processing. This segmentation enables the system to achieve high throughput for high-resolution video while maintaining manageable complexity by breaking down the processing task into smaller, independent units that can be handled by individual cores.

Inventive Principle:
Principle #1Segmentation

2Productivity

If video pictures are divided into multiple sub-pictures for parallel processing, then throughput increases, but workload distribution becomes unbalanced across cores

Engineering Contradiction:
ImprovethroughputVSAvoidworkload distribution
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent applies local quality by calculating the pixel rate for each sub-picture and assigning them to processing cores based on specific allocation rules. This ensures that each core receives a balanced workload in terms of pixel rate, preventing some cores from being overloaded while others remain underutilized. The local optimization of workload distribution across different cores maintains balanced processing while achieving high throughput.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If arbitrary partitioning of video pictures is used, then processing flexibility increases, but hardware implementation costs increase

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidhardware implementation cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent changes the parameter of sub-picture partitioning from arbitrary to constrained by maximum sub-picture dimensions defined in the video coding standard. This constraint reduces hardware implementation complexity by establishing fixed boundaries and uniform processing requirements, while still maintaining sufficient flexibility to support high-resolution video processing through multiple valid partitioning configurations that adhere to the standard's parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260046433A1Video content encoding and distribution
Publication Date: 2026.02.12 TEXAS INSTRUMENTS INC
  • US20260046433A1 patent drawing
  • US20260046433A1 patent drawing
  • US20260046433A1 patent drawing

AI summary

A method for decoding a compressed video bit stream in a video decoder to recover a video sequence, the video decoder including a plurality of decoder processing cores is provided. The method includes determining that a picture is encoded in the compressed bit stream as a pre-determined number of independently encoded sub-pictures, and dispatching a first encoded sub-picture of the pre-determined number of sub-pictures to a first decoder processing core of the plurality of decoder processing cores and a second encoded sub-picture of the pre-determined number of sub-pictures to a second decoder processing core of the plurality of decoder processing cores, wherein the first encoded sub-picture and the second encoded sub-picture are independently decoded in parallel on the respective first and second decoder processing cores.