Adaptive Data Encoding Circuit Using Local Timing on Parallel Wires
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Solution Overview
Problem
Conventional data transmission techniques in microprocessors consume significant power due to voltage transitions and require clock signal distribution, leading to inefficiencies in power management, especially as interconnect lengths increase with processor scaling.
Innovation Solution
A method of transmitting data using a waveform with signal transitions on a subset of wires, where the receiver measures the duration between transitions using a locally generated clock signal, allowing for efficient data encoding and reduced power consumption by eliminating the need for clock signal distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional parallel transmission techniques are used, then data transmission speed is improved, but power consumption increases due to multiple voltage transitions on multiple wires
Solution Approach 1:
The patent extracts the clock signal distribution function from the data transmission system by using locally generated clock signals at receiver nodes. This separation eliminates the need for centralized clock distribution, reducing power consumption while maintaining transmission speed through efficient waveform encoding that uses minimal wire transitions
Solution Approach 2:
The patent employs periodic waveform patterns with specific transition characteristics to encode data. By using predetermined periodic waveforms with controlled transition densities, the system achieves reliable data transmission at high speeds while minimizing the frequency and number of voltage transitions, thereby reducing dynamic power consumption on interconnect wires
2Use of energy by moving object
If conventional deterministic PPM transmission is used, then power consumption becomes independent of data values, but bandwidth efficiency decreases and clock distribution is still required
Solution Approach 1:
The patent segments the data transmission into multiple waveform channels, each carrying portions of the data stream. This segmentation allows parallel transmission of multiple data values simultaneously, improving bandwidth efficiency while maintaining deterministic power consumption characteristics through controlled transition patterns in each segment
Solution Approach 2:
The patent introduces dynamic waveform selection and transition timing based on data values to be transmitted. By dynamically adjusting which wires transition and when, the system achieves both high bandwidth efficiency and deterministic power consumption, eliminating the need for clock distribution while maintaining power independence from data values
3Reliability
If clock signal distribution is implemented for synchronization, then transmitter and receiver synchronization is improved, but power consumption and system complexity increase
Solution Approach 1:
The patent implements self-service synchronization where each receiver node generates its own clock signal locally and uses it to sample and interpret incoming waveforms. This self-generated clocking eliminates the need for external clock distribution infrastructure, significantly reducing power consumption and system complexity while maintaining synchronization accuracy through the inherent timing characteristics of the waveform encoding scheme
Data Source
AI summary
Various energy efficient data encoding schemes and computing devices are disclosed. In one aspect, a method of transmitting data from a transmitter to a receiver connected by plural wires is provided. The method includes sending from the transmitter on at least one but not all of the wires a first wave form that has first and second signal transitions. The receiver receives the first waveform and measures a first duration between the first and second signal transitions using a locally generated clock signal not received from the transmitter. The first duration is indicative of a first particular data value.