Paralleled Power Semiconductors Gate Path Chokes
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Solution Overview
Problem
In high power applications like traction inverters, paralleled power semiconductors experience unbalanced switching transients due to parameter variations and unbalanced junction capacitances, leading to uncontrollable gate voltage oscillations that can exceed rated voltages and cause potential breakdown.
Innovation Solution
Incorporating differential mode (DM) chokes in both the gate and current sensor paths to increase impedance and damp oscillations, with windings implemented as traces on a printed circuit board or within the power module, ensuring equivalent impedance and preventing voltage drop on main and sensor cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If paralleled power semiconductors are used to achieve higher power capability, then power capability is improved, but gate voltage oscillations occur due to unbalanced switching transients
Solution Approach 1:
A differential mode choke is introduced as an intermediary element in the gate path between paralleled power semiconductors. The choke provides a common inductance that equalizes voltage transients across parallel devices, preventing oscillations caused by unbalanced switching behavior. This mediator component directly addresses the reliability issue while preserving the high power capability of paralleled configuration.
Solution Approach 2:
The gate path impedance is modified by adding the differential mode choke, which changes the electrical parameters of the gate circuit. This parameter change introduces a controlled inductive element that dampens voltage oscillations and equalizes switching transients, thereby improving gate voltage stability without compromising the power handling capability of the parallel semiconductor configuration.
2Reliability
If differential mode choke is added in gate path, then gate voltage oscillations are prevented, but device complexity increases
Solution Approach 1:
The differential mode choke is merged with the existing gate driver circuitry and PCB layout. By integrating the choke into the gate path infrastructure already present in power electronic systems, the solution adds minimal structural complexity while effectively preventing gate voltage oscillations. The choke becomes part of the standard gate drive configuration rather than a separate auxiliary component.
3Reliability
If differential mode choke is added in sensor path, then current sensor oscillations are prevented, but device complexity increases
Solution Approach 1:
A second differential mode choke is placed in the current sensor path to serve as an intermediary element that equalizes voltage transients reaching the current sensors. This prevents oscillations in the sensor circuitry while maintaining accurate current measurement capability. The choke acts as a buffer that isolates sensors from voltage imbalances without adding significant structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively prevents gate voltage oscillations and potential breakdowns in paralleled power semiconductors, maintaining switching speed and reducing switching loss without increasing inductance, and can be applied to various types of power semiconductors like MOSFETs and IGBTs.
Implementation Method 1
a first differential mode choke including a pair of windings defining a portion of the gate path
Implementation Method 2
a first differential mode choke including a first magnetic core and a first pair of traces in different layers of the printed circuit board surrounding the first magnetic core and defining windings
Data Source
AI summary
Power electronics circuitry has a pair of parallel power semiconductors each including a gate and a current sensor, a first differential mode choke defining a portion of a gate path connecting the gates, a second differential mode choke defining a portion of a sensor path connecting the current sensors, and a gate driver tapping the gate and current sensor paths.