Parallelization Compiler Task Migration Prevention

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Solution Overview

Problem

Existing methods for parallelizing sequential programs for single-core processors to multi-core processors are cumbersome, leading to increased development costs and reliability issues, especially when macro tasks are added or deleted, causing unintended task migrations between cores.

Innovation Solution

A parallelization compiling method that assigns macro tasks to multiple cores in a way that prevents task migration during program changes, ensuring that added or deleted macro tasks do not affect other tasks, thereby maintaining stability in the execution of the segmented program.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If manual parallelization work is performed to divide sequential programs into sub-processes for multi-core processors, then processing speed increases, but development time and costs increase significantly

Engineering Contradiction:
Improveprocessing speedVSAvoiddevelopment time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The parallelization compiler automatically performs the parallelization process by analyzing the sequential program and generating segmented parallelized code without requiring manual intervention. The system self-services the transformation from sequential to parallel execution models, eliminating the time-consuming manual work while maintaining processing speed benefits.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention replaces the manual mechanical process of program parallelization with an automated compiler-based system. Instead of manually dividing programs into sub-processes, the compiler automatically analyzes dependencies, assigns tasks to cores, and generates the parallelized code, significantly reducing development time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Speed

If manual parallelization work is performed to assign macro tasks to processor cores, then processing speed increases, but reliability decreases due to potential task migration issues

Engineering Contradiction:
Improveprocessing speedVSAvoidprogram reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The parallelization compiler incorporates dependency analysis that continuously monitors task relationships and uses this feedback to make intelligent assignment decisions. The system analyzes data dependencies and control flow to determine optimal task-to-core mappings, ensuring stability and preventing unintended task migrations that would compromise reliability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The compiler performs preliminary dependency analysis and task characterization before generating the parallelized program. By pre-determining which tasks can be safely assigned to which cores based on dependency graphs and execution characteristics, the system ensures reliable task placement from the outset, avoiding subsequent migration issues.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If macro tasks are added or deleted from the sequential program and re-parallelization is performed, then program adaptability increases, but task migration between cores occurs causing instability

Engineering Contradiction:
Improveprogram adaptabilityVSAvoidtask assignment stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The parallelization compiler generates dynamic task assignment strategies that adapt to program changes while maintaining stability where possible. When macro tasks are added or removed, the compiler analyzes the modified program structure and adjusts core assignments dynamically, preserving task stability for unchanged portions while adapting to new requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The compiler segments the program into independent macro tasks with well-defined dependencies, creating a modular parallelized structure. This segmentation allows individual tasks to be added or removed without affecting the stability of other tasks, as each segment can be independently managed and assigned to appropriate cores.

Inventive Principle:
Principle #1Segmentation

4Loss of energy

If multiple processor cores operate in parallel to increase processing speed, then power consumption decreases, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessor architecture complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The parallelization compiler automatically handles the complexity of multi-core architecture by self-services the task analysis, dependency resolution, and core assignment processes. This abstraction shields users from architectural complexity while enabling parallel execution that reduces power consumption compared to single-core high-frequency operation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9934012B2Parallelization compiling method, parallelization compiler, and vehicular device
Publication Date: 2018.04.03 DENSO CORP
  • US9934012B2 patent drawing
  • US9934012B2 patent drawing
  • US9934012B2 patent drawing

AI summary

A parallelization compiling method for generating a segmented program from a sequential program includes assigning macro tasks included in the sequential program to cores included in the multi-core processor in order to generate the segmented program, adding a new macro task to the sequential program or deleting one of the macro tasks from the sequential program, and compiling the sequential program into the segmented program in response to the adding of the new macro task under a condition that the macro tasks assigned to the cores do not migrate among the cores or compiling the sequential program into the segmented program in response to the deleting of the one of the macro tasks under a condition that remains of the macro tasks assigned to the cores do not migrate among the cores.