Parallelization Detection Device for Sequential Program Analysis
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Solution Overview
Problem
Existing methods for detecting parallelism in sequential programs are inefficient, particularly for legacy programs, as they often rely on static analysis and have a low chance of identifying parallelization potential, making it difficult for inexperienced programmers to effectively parallelize code.
Innovation Solution
A dynamic approach using a parallelization detection device that executes the sequential program and identifies computational units (CUs) by tracking control and data dependencies, allowing for accurate detection of potential parallelism through a bottom-up method, enabling the creation of CU chains and synchronization points for parallel execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If static analysis methods are used to detect parallelism, then the analysis process is simple, but the detection accuracy and ability to identify parallelization potential is low
Solution Approach 1:
The patent transitions from static analysis to dynamic analysis by executing the program under instrumentation and observing actual runtime behavior. The system dynamically tracks control dependencies and data dependencies during program execution, allowing accurate identification of parallelization opportunities that static methods miss.
Solution Approach 2:
The patent segments the program into computational units (CUs) with clear boundaries defined by control regions and dependency analysis. Each CU represents an independent computational task that can potentially be executed in parallel, enabling granular parallelism detection at the instruction level.
2Productivity
If coarse-grained parallelism detection is used, then the detection process is faster, but the number of detectable parallelization opportunities is reduced
Solution Approach 1:
The patent divides the program into fine-grained computational units by segmenting at the instruction level within control regions. This segmentation enables detection of small parallelization opportunities that would be invisible in coarser analyses, while the systematic approach maintains detection efficiency.
Solution Approach 2:
The patent changes the granularity parameter of analysis from coarse (function-level or loop-level) to fine (instruction-level within control regions). This parameter change allows the system to detect a much larger number of parallelization opportunities without proportionally increasing analysis time.
3Measurement precision
If existing parallelization detection methods are applied to legacy sequential programs, then the transformation process is straightforward, but the chance of detecting parallelism is severe
Solution Approach 1:
The patent enables legacy sequential programs to self-reveal their parallelization potential through dynamic execution and instrumentation. The program's own runtime behavior exposes control and data dependencies, automatically identifying parallelization opportunities without requiring external domain knowledge or manual analysis.
Solution Approach 2:
The system uses dynamic program execution to uncover parallelism in legacy code, adapting to the actual runtime behavior rather than relying on static assumptions. This dynamic approach successfully identifies parallelization potential in diverse legacy programs regardless of their original design intentions.
Data Source
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AI summary
A method of detecting parallelism in a sequential program is described, the method comprising the steps of: - loading the sequential program to a parallelization detection device (800); - executing the sequential program under control of the parallelization detection device (800); - automatically determine a control region in the sequential program by means of the parallelization detection device (800); - automatically detecting a first computational unit (250, 320, 520) in the sequential program by means of the parallelization detection device (800), by means of • automatically detecting a program step of reading a first program state from a memory device; • automatically detecting a program step of computing a second program state based on the first program state; and • automatically detecting a program step of writing the second program state to the memory device; - automatically indicating the detected first computational unit (250, 320, 520) by means of the parallelization detection device (800). The method is based on a bottom-up approach and may thus increase the number of detected parallelism and may thus simplify coding of parallel versions of sequential programs.