Parallelized Counter Tree Walk for Memory Replay Protection
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Solution Overview
Problem
Existing replay protection mechanisms in computer systems serialize read requests, leading to increased memory access latency and degraded system performance due to the suspension of processing incoming requests if they share tree nodes with ongoing requests, thereby limiting parallel processing.
Innovation Solution
Implementing a parallelized replay protection mechanism within a memory encryption engine that processes read requests in parallel, tracks duplicated requests, and prevents duplicate operations, allowing for efficient integrity and replay protection without serializing read requests.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the existing replay protection algorithm suspends processing of incoming requests that share tree nodes with in-process requests, then replay protection is ensured, but read request processing is serialized, increasing memory access latency and degrading system performance
Solution Approach 1:
The counter tree structure is segmented into multiple levels (L0, L1, L2, L3 counters) with different scopes. L0 counters are per-data-line, L1 counters cover groups of data lines, L2 counters cover larger regions, and L3 counters cover the entire memory space. This segmentation allows parallel processing at different granularities, enabling replay protection while improving system performance by allowing concurrent access to non-conflicting memory regions.
Solution Approach 2:
The patent introduces a hierarchical dimension to the counter tree structure, transforming a flat serialization approach into a multi-level parallel processing model. By organizing counters in a tree hierarchy with multiple dimensions (spatial segmentation across different memory regions and temporal versioning through counter values), the system enables parallel replay protection checks while maintaining security guarantees.
2Productivity
If read requests are processed in parallel, then memory access latency is reduced and system performance is improved, but ensuring replay protection becomes more complex due to potential duplicate operations
Solution Approach 1:
The patent combines replay protection verification with the normal memory access path by integrating the counter tree verification into the encryption/decryption pipeline. The same cryptographic keys and counters used for encryption are also used for replay protection verification, eliminating the need for separate verification mechanisms and reducing overall system complexity despite enabling parallel processing.
Solution Approach 2:
The counter tree structure serves dual purposes: it provides both encryption keys for data protection and replay protection verification. The counters automatically track data line versions and enable parallel request processing through their hierarchical structure, making the system self-protecting without requiring additional complex verification infrastructure.
Data Source
AI summary
A processor includes a memory encryption engine that provides replay and confidentiality protections to a memory region. The memory encryption engine performs low-overhead parallelized tree walks along a counter tree structure. The memory encryption engine upon receiving an incoming read request for the protected memory region, performs a dependency check operation to identify dependency between the incoming read request and an in-process request and to remove the dependency when the in-process request is a read request that is not currently suspended.