Parasitic Capacitance Compensation Circuit for RF Switches
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Solution Overview
Problem
In semiconductor wafer fabrication, RF matching networks face challenges with parasitic capacitance in electronically variable capacitors (EVCs), leading to significant leakage currents when switches are in the OFF state, which affects the efficiency of power transmission in plasma processing.
Innovation Solution
A parasitic capacitance compensation circuit is introduced, utilizing a combination of first and second inductors that are switched in based on peak voltage levels to effectively tune out parasitic capacitance, ensuring minimal leakage currents and efficient power transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If EVCs use multiple discrete capacitors with parallel switches to achieve faster switching and faster matching, then switching speed and manufacturing productivity are improved, but parasitic capacitance leakage current increases significantly when switches are in the OFF state
Solution Approach 1:
An intermediary compensation circuit is introduced between the EVC switches and ground. This circuit includes compensation capacitors connected to compensation inductors, which act as a mediator to capture and redirect the leakage current from parasitic capacitances. The compensation inductors are tuned to resonate with the parasitic capacitances at the operating frequency, creating a null point that eliminates the net leakage current to ground while maintaining the fast switching capability of multiple parallel switches.
Solution Approach 2:
The harmful parasitic capacitances of the switches are converted into a beneficial resonance condition. By selecting compensation inductors with specific values that resonate with the parasitic capacitances at the operating frequency, the previously harmful leakage current is transformed into a resonant current that circulates between the parasitic capacitances and compensation inductors, eliminating the net current leakage to ground and improving overall system efficiency.
2Adaptability or versatility
If the number of discrete capacitors in EVC is increased to expand impedance matching range, then adaptability is improved, but the total parasitic capacitance and associated leakage current increase
Solution Approach 1:
The compensation circuit serves as an intermediary that decouples the relationship between the number of capacitors and the total leakage current. By introducing compensation capacitors and inductors that create resonant null points, the system can accommodate any number of discrete capacitors for expanded impedance matching range without proportionally increasing leakage current, as the compensation circuit actively cancels the cumulative parasitic effects.
Solution Approach 2:
The compensation circuit changes the effective parameter of total leakage current by introducing resonant frequency tuning. By adjusting the compensation inductor values to resonate with parasitic capacitances at the operating frequency, the system transforms the leakage current parameter from a cumulative sum of all switch parasitics to a minimized value determined by the quality of resonance, enabling expanded capacitor arrays without proportional leakage increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The compensation circuit significantly reduces parasitic capacitance, enhancing the efficiency of RF power transmission by minimizing leakage currents and maintaining high performance across varying voltage conditions.
Implementation Method 1
a first inductor operably coupled between a first terminal and a second terminal, the first inductor causing a first inductance between the first and second terminals
Implementation Method 2
a second inductor operably coupled between the first and second terminals and parallel to the first inductor, the second inductor causing a second inductance between the first and second terminals of the switch when the second inductor is switched in
Data Source
AI summary
In one embodiment, a parasitic capacitance compensation circuit for a switch is disclosed that includes a first inductor operably coupled between a first terminal and a second terminal, and a second inductor operably coupled between the first and second terminals and parallel to the first inductor. The second inductor is switched in when a peak voltage on the first and second terminals falls below a first voltage. The first inductance tunes out substantially all of a parasitic capacitance of the switch when the switch is OFF and the peak voltage is above the first voltage. The first and second inductances collectively tune out substantially all of the parasitic capacitance of the switch when the switch is OFF and the peak voltage is below the first voltage.