Paravirtualized Cluster Mode for Legacy APIC Interrupt Routing

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Solution Overview

Problem

Conventional logical destination mode for interrupt handling in virtual machines with legacy xAPIC mode is limited to eight CPU cores, leading to inefficiencies and increased overhead when managing multiple CPU cores.

Innovation Solution

A paravirtualized cluster mode is introduced, allowing interrupts using logical destination mode on virtual machines with more than eight virtual cores by associating each core with an N-bit identifier, enabling the hypervisor to determine the correct core for interrupt delivery based on the destination address, thus supporting increased CPU core flexibility without architectural changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional logical destination mode is used for interrupt handling in virtual machines with legacy xAPIC mode, then the system maintains compatibility with legacy hardware, but the system is limited to eight CPU cores and experiences increased overhead when managing multiple CPU cores

Engineering Contradiction:
Improvenumber of supported CPU coresVSAvoidinterrupt management overhead
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the destination address into multiple fields: a cluster identifier field and a core identifier field. This segmentation allows the system to first route interrupts to the appropriate cluster, then to the specific core within that cluster, effectively extending the addressing capability beyond the original 8-core limit while maintaining manageable complexity at each level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an additional dimension to the interrupt routing architecture by adding the cluster level between the interrupt source and the core destination. This creates a hierarchical structure (cluster -> core) that expands the addressable space from 8 cores to 8 clusters × 8 cores = 64 cores, resolving the limitation without requiring complete redesign of the interrupt controller.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If the number of virtual cores exceeds eight in a virtual machine using legacy xAPIC mode, then the system loses the ability to use logical destination mode for interrupt handling, but increasing the register size would require hardware changes

Engineering Contradiction:
Improvenumber of virtual coresVSAvoidhardware compatibility
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent implements dynamic interpretation of the destination address field based on the number of virtual cores in the VM. When the VM has more than 8 cores, the hypervisor dynamically adjusts the routing logic to use the extended cluster-core hierarchy. This dynamic adaptation allows the system to support variable core counts without requiring different hardware configurations or register sizes.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces the cluster identifier as an intermediary layer between the destination address and the core selection. This intermediary allows the legacy xAPIC hardware to be used unchanged while enabling support for more than 8 cores through software-based cluster management. The cluster level mediates between the limited hardware addressing capability and the need for extended core support.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If conventional interrupt routing is used with more than eight virtual cores, then the system must use physical destination mode which increases overhead, but logical destination mode is restricted to eight cores

Engineering Contradiction:
Improveinterrupt handling efficiencyVSAvoidinterrupt routing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the interrupt routing process into two stages: cluster-level routing followed by core-level routing. This segmentation allows logical destination mode to be applied at both levels, maintaining efficiency by using bitwise AND operations for cluster matching, then for core selection within the matched cluster, rather than requiring full physical destination mode across all cores.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds the cluster dimension to the interrupt routing space, transforming the flat 8-core logical destination mode into an 8-cluster-by-8-core hierarchical structure. This dimensional extension allows logical destination mode benefits (efficient bitwise matching) to be preserved while supporting up to 64 cores, avoiding the overhead of physical destination mode.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11281607B2Paravirtualized cluster mode for legacy APICs
Publication Date: 2022.03.22 RED HAT INC
  • US11281607B2 patent drawing
  • US11281607B2 patent drawing
  • US11281607B2 patent drawing

AI summary

According to one example, a method includes, with a hypervisor, advertising a paravirtualized cluster mode for a guest using a legacy Advanced Programmable Interrupt Controller (APIC), the paravirtualized cluster mode allowing for interrupts using logical destination mode on a virtual machine having a plurality of virtual cores that is greater than eight. The method further includes, associating each of the plurality of virtual cores with an N-bit identifier formatted to be one of 2N different values. The method further includes, with the hypervisor, in response to receiving an interrupt for the virtual machine, determining to which of the plurality of virtual cores the interrupt should be sent based on at least a subset of bits in a destination address of the interrupt.