Paravirtualized Idle Processor Management in Virtualized Systems

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Solution Overview

Problem

In virtualized systems, existing technologies lack accurate methods for managing idle processors, leading to inefficiencies in power consumption and performance due to inaccurate idle time estimates by hypervisors.

Innovation Solution

The implementation of paravirtualization, where the guest operating system provides accurate anticipated idle times to the hypervisor, allowing for the selection of the deepest possible power state for processors, thereby reducing power consumption and latency by halting processors when idle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the hypervisor estimates idle time for processor power state management, then power consumption can be reduced, but the idle time estimates are inaccurate leading to suboptimal power state selection

Engineering Contradiction:

Improvepower consumptionVSAvoididle time estimation accuracy

Core Design Contradiction:

Loss of energyVSMeasurement precision

Solution Approach 1:

The patent introduces a paravirtualization layer as an intermediary between the guest operating system and the hypervisor. The guest OS provides accurate idle time information through paravirtualized interfaces, enabling the hypervisor to make precise power state decisions without having to independently estimate idle time, thus resolving the accuracy problem while maintaining energy efficiency

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where the guest operating system continuously provides actual idle time information to the hypervisor through paravirtualized calls. This feedback loop allows the hypervisor to adjust power state selections dynamically based on accurate real-time data, improving both energy efficiency and measurement precision

Inventive Principle:

Principle #23Feedback

2Loss of energy

If the processor enters deeper power states to reduce power consumption, then energy efficiency improves, but wake-up latency increases

Engineering Contradiction:

Improvepower consumptionVSAvoidwake-up latency

Core Design Contradiction:

Loss of energyVSLoss of time

Solution Approach 1:

The patent uses accurate idle time predictions from the guest OS to determine in advance the appropriate power state to enter. By calculating the expected idle duration and comparing it against known wake-up latencies for different power states, the system selects the deepest power state that still meets performance requirements, thereby reducing power consumption without excessive wake-up latency

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic power state selection based on real-time idle time information. The system continuously adjusts the target power state according to the current idle duration predictions, allowing processors to enter deeper power states when idle time is long and shallower states when idle time is short, thus dynamically optimizing the trade-off between power consumption and wake-up latency

Inventive Principle:

Principle #15Dynamics

3Productivity

If paravirtualization is implemented to improve idle time accuracy, then power management efficiency improves, but system complexity increases

Engineering Contradiction:

Improvepower management efficiencyVSAvoidsystem complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the interaction parameters between the guest OS and hypervisor by introducing paravirtualized idle time reporting mechanisms. Instead of the hypervisor independently estimating idle time, the system changes the parameter source to use actual idle time data from the guest OS, improving power management efficiency while the paravirtualization overhead remains manageable

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS11157302B2Idle processor management in virtualized systems via paravirtualization

Publication Date: 2021.10.26 RED HAT ISRAEL

AI summary

A system and method are disclosed for managing idle processors in virtualized systems. A hypervisor executing on a host comprising one or more physical processors receives an anticipated idle time for a physical processor of the one or more physical processors of the host from a guest operating system of a virtual machine executing on the host. In response to determining that a function of the anticipated idle time exceeds an exit time of a first power state of the physical processor, the physical processor is caused to be halted and placed in the first power state.