Parent-Managed Device Threads Beyond OS Thread Limits

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Solution Overview

Problem

Existing systems are limited by the number of threads supported by the operating system, which restricts the parallel execution of tasks on multiple processing circuitries, leading to underutilization and decreased performance.

Innovation Solution

Expand each host thread into multiple device threads executed on separate processing circuitries with a parent thread managing communication, allowing parallel execution beyond the operating system's limits and enabling access to shared resources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the system executes multiple parallel threads using traditional multithreading models, then thread utilization of processing circuitries increases, but the number of parallel threads is limited by operating system constraints

Engineering Contradiction:
Improvethread utilizationVSAvoidnumber of parallel threads
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent segments the traditional thread model into two distinct components: host threads executed on the host processing circuitry and device threads executed on processing circuitries. This segmentation allows the system to bypass operating system thread limits by creating device threads that are managed independently from the OS thread model, thereby increasing the total number of parallel executable threads beyond traditional constraints

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces parent threads as intermediary entities that bridge the gap between host threads and device threads. The parent thread executes on the host processing circuitry and manages communication with multiple device threads executing on separate processing circuitries, enabling the host thread to indirectly control more parallel threads than the operating system would normally allow

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If more parallel threads are executed to increase throughput, then task completion speed increases, but latency in thread management and communication increases

Engineering Contradiction:
ImprovethroughputVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent establishes parent threads in advance to manage device thread execution and communication. By pre-configuring the parent thread structure and its association with multiple device threads, the system reduces runtime overhead for thread management and communication, thereby decreasing latency while maintaining high throughput

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent moves thread execution to another dimension by separating host thread execution (on host processing circuitry) from device thread execution (on separate processing circuitries). This dimensional separation allows parallel threads to execute independently without contending for the same execution resources, reducing management latency while increasing overall throughput

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12619459B2Extending parallel software threads
Publication Date: 2026.05.05 NEXTSILICON LTD
  • US12619459B2 patent drawing
  • US12619459B2 patent drawing
  • US12619459B2 patent drawing

AI summary

A method for executing a software program, comprising: identifying in a program a plurality of host threads, each for performing some of a plurality of parallel sub-tasks of a task; and for each of the host threads: generating device threads, each associated with the host thread, each for one of the parallel tasks associated thereof; generating a parent thread associated with the host thread for communicating with the device threads; configuring a host processing circuitry to execute the parent thread; and configuring at least one other processing circuitry to execute in parallel the device threads while the host processing circuitry executes the parent thread; and for at least one of the host threads: receiving by the parent thread a value from the at least one other processing circuitry, the value generated when executing at least one of the device threads associated with the at least one host thread.