Parity Bit Insertion Layout for Synchronized Disk Data Writing
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Solution Overview
Problem
In hard disk drives, the integration of error correcting codes (ECC) and inner codes for data integrity poses challenges in synchronizing the writing of encoded data with servo data, leading to potential overwriting of servo data locations due to unpredictable placement of ECC and inner-code parity bits.
Innovation Solution
A coding system that includes a constrained encoder, a bit insertion module for inserting predetermined bit locations, an ECC encoder for generating ECC parity bits, and an inner encoder for generating inner-code parity bits, which are programmed into these bit locations, ensuring equal quantities of inner-code parity bits and bit locations to synchronize data writing and avoid servo data overwriting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC and inner codes are integrated for data integrity, then data reliability is improved, but synchronization difficulty increases leading to potential overwriting of servo data
Solution Approach 1:
The patent applies preliminary action by inserting placeholder bits into predetermined locations in the encoded data stream before ECC encoding. These placeholder bits reserve space for future inner-code parity bits, ensuring that the positions of parity bits are known in advance. This allows the system to synchronize data writing with servo data writing without risk of overwriting, while maintaining data integrity through the integrated ECC and inner code structure.
2Adaptability or versatility
If parity bits are placed at unpredictable locations, then coding flexibility is improved, but synchronization precision deteriorates causing servo data overwriting
Solution Approach 1:
The patent applies segmentation by dividing the data stream into segments with predetermined structures. Placeholder bits are inserted at specific intervals and positions within each segment, creating a regular pattern that allows synchronization. The inner-code parity bits are then placed in these predetermined locations within each segment, maintaining both coding flexibility through the inner code and synchronization precision through the structured placement.
3Reliability
If a symbol clock cadence module is added to prevent overwriting, then data reliability is improved, but device complexity and throughput are worsened
Solution Approach 1:
The patent applies the taking out principle by removing the need for a symbol clock cadence module through the placeholder bit approach. Instead of adding a complex synchronization control module, the solution extracts the synchronization function into the simple placeholder bit insertion mechanism that is already part of the encoding process. This maintains data reliability while avoiding the complexity and throughput penalties of an additional control module.
4Measurement precision
If placeholder bits are inserted in predetermined locations, then writing synchronization is improved, but data throughput may be affected
Solution Approach 1:
The patent applies merging by combining the placeholder bit insertion with the existing ECC encoding process. The placeholder bits are inserted into the data stream at the same stage where ECC parity bits are generated, and both are processed together through the same encoding pipeline. This integration ensures that the placeholder bits do not create additional processing stages or bottlenecks, maintaining data throughput while achieving precise writing synchronization.
Data Source
AI summary
A coding system for digital data includes a constrained encoder module that generates encoded data based on a first constrained code, a bit insertion module that inserts at least one bit location in the encoded data, an error correcting code (ECC) encoder module that generates ECC parity bits based on the at least one bit location and the encoded data, and an inner encoding module that generates inner-code parity bits based on the encoded data and programs the inner-code parity bits into the at least one bit location.