Parity Interleaving in RLL Codewords for Higher Coding Rate

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Solution Overview

Problem

Current data encoding systems, particularly those using Reed-Solomon error-correcting codes, face challenges with insufficient timing information and catastrophic sequences in the parity portion, leading to degraded detector performance and increased error propagation, especially when using Low Rate RLL codes for redundancy encoding.

Innovation Solution

The proposed solution involves encoding data using a high rate RLL code, interleaving parity information with RLL-encoded data, and employing error-and-erasure decoding to spread parity positions throughout the data, thereby maintaining RLL constraints and reducing error propagation without relying on Low Rate RLL codes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Low Rate RLL code is used for RS ECC redundancy encoding, then RLL constraint is maintained in parity portion, but code rate decreases and error propagation increases

Engineering Contradiction:
Improvedetector performanceVSAvoidcode rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the codeword into data portion and parity portion, applying different RLL coding rates to each segment. The data portion uses HR RLL code while the parity portion uses LR RLL code, allowing each segment to be optimized independently for its specific requirements

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different RLL coding rates are applied to different portions of the data stream. The HR RLL code is applied where high data rate is needed (data portion), while LR RLL code is applied where reliability is more critical (parity portion), creating local optimization rather than uniform coding

Inventive Principle:
Principle #3Local quality

2Reliability

If LR RLL code is used for parity encoding, then timing information is improved, but device complexity increases due to dual RLL decoding requirement

Engineering Contradiction:
Improvetiming informationVSAvoiddecoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoding process is segmented into two independent stages: first decoding the LR RLL encoded parity portion to recover RS ECC redundancy, then decoding the HR RLL encoded data portion. This segmentation allows each decoder to be optimized for its specific code type without requiring the other

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary processing stage where the LR RLL decoded parity information is used to assist in the subsequent HR RLL decoding process, particularly in error detection and correction scenarios where the parity information provides validation

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If HR RLL code is used for data encoding, then code rate increases, but RLL constraint is violated in parity portion leading to catastrophic sequences

Engineering Contradiction:
Improvecode rateVSAvoidRLL constraint satisfaction
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the encoded stream into distinct data and parity segments, applying HR RLL coding only to the data segment where high rate is acceptable, while maintaining LR RLL coding for the parity segment where constraint satisfaction is critical for preventing catastrophic error sequences

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different coding strategies are applied locally to different portions of the data stream based on their functional requirements. The data portion receives HR RLL encoding for maximum throughput, while the parity portion receives LR RLL encoding to ensure constraint compliance and prevent catastrophic failures

Inventive Principle:
Principle #3Local quality

4Reliability

If parity information is separated from data, then error correction capability is maintained, but format efficiency decreases due to overhead

Engineering Contradiction:
Improveerror correction capabilityVSAvoidformat efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges the data portion and parity portion into a single interleaved code stream that satisfies RLL constraints throughout. This unified approach eliminates the need for separate processing of parity information and reduces overall format overhead while maintaining full error correction capability

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8484527B2Systems and methods for achieving higher coding rate using parity interleaving
Publication Date: 2013.07.09 MARVELL ASIA PTE LTD
  • US8484527B2 patent drawing
  • US8484527B2 patent drawing
  • US8484527B2 patent drawing

AI summary

The disclosed technology provides systems and methods for encoding data based on a run-length-limited code and an error correction code to provide codewords. The codewords include RLL-encoded data that are produced based on the RLL code, and parity information that are produced based on the error correction code. The parity information is interleaved among the RLL-encoded data. In one embodiment, the codeword is produced by separately producing the RLL-encoded data and the parity information, and interleaving the parity information among the RLL-encoded data. In one embodiment, the codeword is produced by producing the RLL-encoded data, and using erasure decoding to compute the parity information.