Layered Iterative Error Correction With Parity-Based Early Stopping
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Solution Overview
Problem
Existing error correction methods in memory devices face challenges in balancing powerful error correction with constraints on latency, throughput, and power consumption, particularly in portable electronic devices.
Innovation Solution
Implementing a stopping criterion for layered iterative error correction by parity checking on a layer-by-layer basis and stopping the iterative process when a particular layer's parity check is correct, thereby transferring the codeword to an algebraic error correction circuit for further processing, which reduces power consumption without increasing codeword failure rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If layered iterative error correction is performed with multiple layers and iterations, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent applies partial action by implementing early stopping criteria in layered iterative error correction. Instead of always completing all layers and iterations, the decoder stops when a codeword satisfies stopping criteria (such as minimum Hamming weight or parity check satisfaction). This partial execution reduces power consumption while maintaining sufficient error correction capability for most codewords, resolving the contradiction between reliable error correction and power consumption in portable devices.
2Reliability
If layered iterative error correction is performed with multiple layers and iterations, then error correction capability is improved, but processing time increases
Solution Approach 1:
The patent implements partial action through early stopping criteria that prevent completion of all iterative layers when errors are already corrected. By monitoring codeword properties during iteration and stopping when stopping criteria are met, the system achieves effective error correction with reduced processing time, resolving the contradiction between error correction capability and latency constraints in memory systems.
3Reliability
If layered iterative error correction is performed with multiple layers and iterations, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by enabling the error correction system to automatically monitor its own state and make stopping decisions based on predefined criteria. The decoder independently evaluates codeword properties (such as Hamming weight or parity check results) during iteration and autonomously determines when to stop, eliminating the need for complex external control logic. This resolves the contradiction between error correction capability and device complexity.
Data Source
AI summary
The present disclosure includes apparatuses and methods related to stopping criteria for layered iterative error correction. A number of methods can include receiving a codeword with an error correction circuit, iteratively error correcting the codeword with the error correction circuit including parity checking the codeword on a layer-by-layer basis and updating the codeword after each layer. Methods can include stopping the iterative error correction in response to a parity check being correct for a particular layer.


