Parsimonious Data Memory Circuit Using Non-Zero Extraction
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Solution Overview
Problem
Existing FIFO memories are inefficient in optimizing memory size for parsimonious data in convolutional neural networks, as they do not allow for the exclusion of zero values, leading to suboptimal memory usage and performance in hardware architectures.
Innovation Solution
A customized FIFO memory architecture comprising an encoder, a decoder, and a memory block that saves only non-zero data, with the encoder detecting and encoding zero values and the decoder reconstructing the original data vector, allowing for a reduced memory size without performance degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional FIFO memories are used to store all data including zero values, then the memory can store complete data vectors, but the memory size is unnecessarily large when data is parsimonious
Solution Approach 1:
The encoder extracts only the non-zero elements from the input data vector and generates an indicator vector marking their positions. The FIFO memory then stores only these extracted non-zero elements along with their position information, rather than storing the entire data vector including all zero values. This extraction principle directly reduces memory occupancy while maintaining data integrity.
Solution Approach 2:
The system changes the representation parameters of the data by transforming the original data vector into a compressed format consisting of non-zero values and their positions. The encoder modifies the data parameters by generating an indicator vector and a reduced data vector, which are then stored in the FIFO. This parameter transformation enables more efficient memory utilization.
2Volume of stationary object
If only non-zero data are saved in FIFO memories, then memory size is reduced, but the complexity of the system increases due to encoder and decoder requirements
Solution Approach 1:
The memory system is segmented into distinct functional blocks: an encoder unit that processes input data and generates indicator/non-zero data vectors, a FIFO memory block that stores the compressed data, and a decoder unit that reconstructs the original data. This segmentation allows each component to be optimized independently and simplifies the overall architecture by clearly defining responsibilities.
Solution Approach 2:
The encoder acts as an intermediary between the input data source and the FIFO memory, transforming the data into a compressed format suitable for efficient storage. The decoder serves as an intermediary between the FIFO memory and the output, reconstructing the original data format. These intermediary components manage the complexity by handling the compression and decompression operations.
3Quantity of substance
If zero values are excluded from storage, then memory occupancy increases, but information about the original data structure may be lost
Solution Approach 1:
The system embeds the indicator vector (containing position information of non-zero elements) within the same storage structure as the non-zero data elements themselves. The FIFO memory stores both the indicator information and the actual non-zero values in a nested manner, ensuring that position information is preserved alongside the data values for accurate reconstruction.
Solution Approach 2:
The indicator vector provides feedback information about the positions of non-zero elements, which is used by the decoder to correctly place the extracted non-zero values in their original positions during reconstruction. This feedback mechanism ensures that no structural information is lost despite excluding zero values from storage.
Data Source
AI summary
A memory circuit for storing parsimonious data and intended to receive an input vector of size Iz, includes an encoder, a memory block comprising a first memory region and a second memory region divided into a number Iz of FIFO memories, each FIFO memory being associated with one component of the input vector, only non-zero data being saved in the FIFO memories, a decoder, the encoder being configured to generate an indicator of non-zero data for each component of the input vector, the memory circuit being configured to write the non-zero data of the input data vector to the respective FIFO memories and to write the indicator of non-zero data to the first memory region, the decoder being configured to read the outputs of the FIFO memories and the associated indicator in the first memory region.