Partial Block Erase for Non-Volatile Memory Disturb Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile memory systems face issues with program disturb and read disturb due to pass voltages applied during programming, leading to unintended changes in threshold voltages of unprogrammed memory cells, which can result in erroneous data storage.
Innovation Solution
Implementing a partial block erase operation during programming, where the memory system divides the programming process into portions with intervening partial block erase operations to mitigate disturbances in unprogrammed regions, ensuring that only unprogrammed memory cells are erased while inhibiting programmed cells from being inadvertently programmed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pass voltages are applied during programming operations, then programming speed is improved, but program disturb and read disturb occur in unprogrammed memory cells
Solution Approach 1:
The memory block is divided into multiple sections (e.g., first block, second block, third block) along the word line direction. Different erase depths are applied to different sections: sections with programmed data retain their original erase depth, while unprogrammed sections receive enhanced erase depth. This segmentation allows selective disturbance mitigation without compromising programming speed or previously stored data.
Solution Approach 2:
The patent applies different erase depths locally to different regions of the memory block based on programming status. Unprogrammed sections receive a first erase depth that mitigates pass voltage disturbance, while programmed sections maintain their original erase depth to preserve data integrity. This local quality approach ensures that disturbance mitigation is applied only where needed.
2Reliability
If full block erase is performed before programming, then data integrity is improved, but programming time increases
Solution Approach 1:
Instead of performing a full block erase before programming, the patent applies partial erase operations only to unprogrammed sections of the memory block. This partial action approach eliminates the need to erase already programmed sections, significantly reducing programming time while still maintaining data integrity in unprogrammed regions through targeted disturbance mitigation.
Solution Approach 2:
The memory block is segmented into programmed and unprogrammed sections, with erase operations selectively applied only to unprogrammed sections. This segmentation avoids redundant erase operations on already programmed data, reducing overall programming time while maintaining data integrity where needed.
3Manufacturing precision
If multiple verify operations are performed for each programming pulse, then programming precision is improved, but programming time increases
Solution Approach 1:
The patent performs preliminary disturbance mitigation by applying enhanced erase depth to unprogrammed sections before programming operations begin. This preliminary action prevents pass voltage disturbance from affecting unprogrammed cells, eliminating the need for multiple verify operations to detect and correct disturbance-induced errors, thus reducing programming time while maintaining precision.
Solution Approach 2:
The patent applies preliminary anti-action by erasing unprogrammed sections to a deeper level before programming to counteract the anticipated pass voltage disturbance. This preliminary counter-measure prevents disturbance effects from manifesting during programming, reducing the need for subsequent verify and re-program operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces program disturb and read disturb by maintaining the integrity of programmed states and ensuring accurate data storage, improving the reliability of non-volatile memory operations.
Implementation Method 1
program disturb and read disturb due to pass voltages applied during programming, leading to unintended changes in threshold voltages of unprogrammed memory cells
Implementation Method 2
erasing a second group of word lines while inhibiting the first group of word lines from being erased
Data Source
AI summary
A non-volatile memory system utilizes partial block erasing during program operations to mitigate the effects of programming pass voltage disturbances. A programming request is received that is associated with a group of word lines from a block, such as all or a portion of the word lines. The system erases and soft programs the block prior to beginning programming. The system programs a subset of the word lines of the block for the programming request. After programming the subset of word lines, the system pauses the programming operation and performs an erase operation for the unprogrammed word lines of the block. The already programmed word lines and one or more optional buffer word lines may be inhibited from erasing during the erase operation. After erasing the unprogrammed word lines, the system completes the programming request by programming the remaining user data in the unprogrammed region of the block.