Partial Block Handling in Non-Volatile Memory Devices
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Solution Overview
Problem
Partial blocks in non-volatile memory devices experience increased error rates due to temporal voltage shift (TVS) effects, which are not effectively addressed by existing techniques, leading to reduced performance and quality of service in memory sub-systems.
Innovation Solution
Implementing an optimal padding scheme where memory cells associated with unprogrammed wordlines in partial blocks are programmed with padding data in a mixed pattern, using a TLC pattern for boundary wordlines and SLC or MLC patterns for remaining wordlines to reduce TVS effects and convert the partial block to a full block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If padding data is programmed to unprogrammed wordlines in partial blocks, then error rates are reduced and TVS effects are minimized, but additional programming operations are required increasing complexity
Solution Approach 1:
The patent applies different padding patterns to different regions of the partial block based on their susceptibility to TVS effects. Boundary wordlines (most susceptible to TVS) receive first padding data with a first pattern, while inner wordlines (less susceptible) receive second padding data with a second pattern. This localized differentiation reduces error rates where needed while optimizing overall programming efficiency.
Solution Approach 2:
The patent changes the data pattern parameter across different wordline regions. By using a first pattern for boundary wordlines and a second pattern for inner wordlines, the system adapts the programming parameters to match the local characteristics of each region, thereby minimizing TVS effects and reducing error rates without uniformly increasing complexity across the entire block.
2Ease of manufacture
If a uniform padding pattern is applied to all unprogrammed wordlines, then implementation is simplified, but TVS effects are not effectively reduced leading to higher error rates
Solution Approach 1:
The patent implements local quality by differentiating between boundary wordlines and inner wordlines. Boundary wordlines receive a first padding pattern specifically designed to counteract TVS effects, while inner wordlines receive a second padding pattern. This localized approach effectively reduces error rates in the most susceptible regions without requiring complete uniformity across the entire block.
Solution Approach 2:
The patent segments the unprogrammed wordlines into at least two groups: boundary wordlines adjacent to programmed wordlines and inner wordlines. This segmentation allows the application of different padding strategies to different segments, optimizing error reduction where TVS effects are most pronounced while maintaining implementation feasibility.
3Quantity of substance
If partial blocks are left as-is without conversion to full blocks, then storage capacity is preserved, but quality of service deteriorates due to increased error rates
Solution Approach 1:
The patent performs preliminary padding operations on unprogrammed wordlines before the partial block is eventually closed or converted to a full block. By pre-programming these wordlines with appropriate padding patterns, the system maintains storage capacity while proactively eliminating sources of future errors, thereby preserving quality of service.
Solution Approach 2:
The patent converts the potentially harmful empty unprogrammed wordlines into beneficial padded wordlines. By filling these previously problematic regions with carefully designed padding patterns, the system transforms what would be error sources into reliable storage regions, thereby converting a disadvantage into an advantage while maintaining overall storage capacity.
Data Source
AI summary
A processing device in a memory sub-system initiates a partial block handling protocol for a closed block of a memory device, the block comprising a plurality of wordlines. The processing device further sends a first programming command to the memory device to program one or more wordlines of the block with first padding data having a first data pattern, wherein the one or more wordlines are adjacent to a last wordline of the block programmed before the block was closed. In addition, the processing device sends a second programming command to the memory device to program all of a set of remaining wordlines of the block with second padding data having a second data pattern comprising fewer bits of data per cell than the first data pattern.


