Partial Block Padding in Memory Arrays
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Solution Overview
Problem
Partially programmed blocks in memory devices experience reduced threshold voltages due to the back pattern effect, capacitive coupling, and lateral charge migration, leading to inefficiencies in read operations.
Innovation Solution
Programming padding data into the unprogrammed word lines of partially programmed blocks using a course programming operation in QLC mode or switching to SLC, MLC, or TLC modes to reduce the time required for padding and minimize the drop in threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional programming operations are used to program unprogrammed word lines in partially programmed blocks, then the threshold voltage drop caused by back pattern effect, capacitive coupling, and lateral charge migration is addressed, but the programming time is excessively long
Solution Approach 1:
The patent applies parameter changes by switching between different programming modes (QLC, TLC, MLC, SLC) to optimize the programming process. Specifically, it uses QLC mode for initially programmed word lines and TLC mode for padding unprogrammed word lines, thereby changing the programming parameters to reduce both time and threshold voltage drop.
Solution Approach 2:
The patent performs preliminary programming actions by first programming word lines in QLC mode before addressing the remaining unprogrammed word lines with TLC mode padding. This preliminary action reduces the overall threshold voltage impact while minimizing additional programming time.
2Productivity
If QLC mode is used for programming padding data, then programming speed is improved by more than 70%, but the threshold voltage drop may still occur in unprogrammed word lines
Solution Approach 1:
The patent segments the programming process into two distinct phases: first programming word lines in QLC mode for high speed, then separately addressing unprogrammed word lines with TLC mode padding. This segmentation allows each phase to optimize for its specific goal (speed vs. completeness).
Solution Approach 2:
The patent applies partial action by using QLC mode for the majority of word lines that need programming, then applying TLC mode only to the remaining unprogrammed word lines. This partial application of different programming modes optimizes overall performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution significantly reduces the padding programming time by more than 70% when using a course QLC programming operation and by more than 80% when using a TLC programming operation, thereby improving read operation efficiency in partially programmed blocks.
Implementation Method 1
Partially programmed blocks in memory devices experience reduced threshold voltages due to the back pattern effect, capacitive coupling, and lateral charge migration
Implementation Method 2
Partially programmed blocks in memory devices experience reduced threshold voltages due to the back pattern effect, capacitive coupling, and lateral charge migration
Data Source
AI summary
Apparatuses and methods for programming partially programmed blocks with padding are provided. One example apparatus can include a controller configured to program a first number of word lines in a block of word lines in the array of memory cells, wherein the first number of word lines is less that a total number of word lines in the block, and program a second number of word lines of the array of memory cells, wherein the second number of word lines are programmed with padding and wherein the second number of word lines are different word lines that the first number of word lines and the total number of word lines in the block includes the first and second number of word lines.