Partial Block Read Compensation via Voltage Offset
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Solution Overview
Problem
Memory devices experience increased bit error rates and latency due to the back-pattern effect in partially programmed blocks, which cannot be adequately compensated for by existing calibration techniques, leading to reduced system performance and quality of service.
Innovation Solution
The proposed solution involves offsetting the voltage used during read operations based on a comparison of currents passing through memory cells, allowing for real-time compensation of voltage shifts caused by partial block programming, even in the absence of power, by using a comparator circuit to generate an analog signal indicative of the block's programming state, thereby applying a corresponding voltage offset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing calibration techniques are used to compensate for voltage shifts in partially programmed blocks, then some voltage compensation is achieved, but the bit error rate remains high and latency increases due to inadequate compensation
Solution Approach 1:
The patent applies preliminary action by performing calibration reads during the programming process itself. The calibration read is executed after programming a portion of the block, and the resulting voltage offset value is stored in the block's metadata. This pre-computed offset is then applied during subsequent read operations on partially programmed blocks, eliminating the need for real-time compensation calculations and reducing read latency while improving bit error rate.
2Measurement precision
If voltage offset values are retrieved from memory during read operations, then dynamic compensation is achieved, but additional memory access operations increase latency
Solution Approach 1:
The voltage offset value is computed in advance during the programming operation and stored in the block's metadata. When a read operation is performed on a partially programmed block, the controller retrieves the pre-stored offset value from the block's metadata rather than performing new calibration reads. This preliminary computation and storage of compensation values eliminates additional memory access operations during reads, reducing latency while maintaining compensation accuracy.
3Reliability
If calibration reads are performed on partially programmed blocks, then voltage shifts can be compensated, but the process is time-consuming and reduces system performance
Solution Approach 1:
The patent merges the calibration read operation with the normal programming workflow. The calibration read is performed as part of the programming sequence, and the resulting offset value is stored in the block's metadata. This integration allows voltage compensation to be achieved without requiring separate, time-consuming calibration operations, thereby improving read accuracy while maintaining system performance.
Solution Approach 2:
The calibration read and offset computation are performed in advance during programming, so that when read operations occur, the compensation value is already available. This preliminary action eliminates the need for time-consuming calibration operations during reads, improving both read accuracy and system performance.
4Productivity
If no voltage compensation is applied to partially programmed blocks, then read operations are fast, but bit error rates increase due to the back-pattern effect
Solution Approach 1:
The voltage offset value is computed in advance during programming and stored in the block's metadata. During read operations, this pre-computed offset is applied to compensate for the back-pattern effect, ensuring accurate reads without requiring time-consuming calibration operations. This approach maintains fast read speeds while improving bit error rate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the raw bit error rate and read trigger rates, improving memory access latency and overall system performance by eliminating the need for additional memory access operations to retrieve voltage offset values, thus enhancing the quality of service.
Implementation Method 1
a comparator circuit to generate an analog signal indicative of the block's programming state
Data Source
AI summary
A method for partial block read compensation can include receiving a read request that specifies a memory cell connected to a string of series-connected memory cells in an array of memory cells on a memory device, the string located at an intersection of a wordline and a bitline, and causing a first voltage applied to the wordline to which the specified memory cell is connected to ramp to a first predetermined value. The method can include causing a second voltage applied to the bitline to which the specified memory cell is connected to ramp to a second predetermined value, and can include comparing, using a current comparator, a current along the string with a reference current to generate an analog output signal. It can also include causing a voltage offset, based on the analog output signal, to be applied to a read voltage level during a sensing operation.