Partial-Block Storage Writes with Adjacent LBA Merging

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Solution Overview

Problem

Modern data storage systems face inefficiencies in read-modify-write (RMW) operations due to discrepancies in logical block address (LBA) sizes between host and storage devices, leading to increased operational times, especially when host LBAs are smaller than storage device LBAs.

Innovation Solution

The technology optimizes RMW operations by reading data from adjacent storage device LBAs into a cache, modifying it, and writing it back during a single operation, leveraging spatial adjacency conditions to reduce the number of revolutions or page writes required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional read-modify-write operations are performed for each host LBA separately, then data integrity is maintained, but operational time increases significantly

Engineering Contradiction:
Improvedata integrityVSAvoidoperational time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent combines multiple separate read-modify-write operations into a single unified operation by identifying spatially adjacent host LBAs and processing them together in one disk revolution, rather than executing each operation separately

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary identification of spatially adjacent LBAs and prepares a combined operation plan before executing the read-modify-write sequence, allowing optimization of the operation path and reducing total execution time

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple separate RMW operations are executed, then precise data modification is achieved, but the number of disk revolutions increases

Engineering Contradiction:
Improvedata modification precisionVSAvoiddisk operation throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

Multiple individual RMW operations targeting adjacent LBAs are merged into a single disk revolution operation, maintaining precise data modification for each LBA while improving overall throughput by eliminating repeated seek and rotation overhead

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system segments the disk surface into groups of spatially adjacent LBAs that can be processed together in a single operation, allowing efficient batch processing while maintaining individual LBA modification precision

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If host LBA sizes differ from storage device LBA sizes, then application compatibility is improved, but operational complexity increases

Engineering Contradiction:
Improveapplication compatibilityVSAvoidLBA mapping complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system introduces an intermediary mapping layer that translates between host LBA addresses and storage device LBA addresses, enabling applications to use their native sector sizes while the storage device operates with its optimized block sizes without exposing complexity to the application

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12386531B2Partial block performance management
Publication Date: 2025.08.12 SEAGATE TECH LLC
  • US12386531B2 patent drawing
  • US12386531B2 patent drawing
  • US12386531B2 patent drawing

AI summary

The technology disclosed herein provides a method including receiving a plurality of host write requests at a plurality of host logical block addresses (HLBAs), determining spatial adjacency of the plurality of host LBA write requests on a media of a storage device, and in response to determining that the spatial adjacency of the plurality of host LBAs (HLBAs) write requests meets a spatial adjacency condition reading data from a plurality of storage device LBAs (DLBAs) corresponding to each of the plurality of HBLAs into a cache, modifying the read data for each of the plurality of DBLAs in the cache, and writing the modified data at each of the plurality of DBLAs during a single data write operation.