Integrated Circuit Design for Partial Die Tape Outs

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Solution Overview

Problem

Existing integrated circuits are inefficient as they often include unnecessary components and functionality, leading to wasted power and resources, especially in portable systems with limited power supplies.

Innovation Solution

The development of an integrated circuit design that supports both full and partial instances from a common design database, allowing for the creation of smaller, more power-efficient partial instances by removing unnecessary components while maintaining the same circuit components and physical arrangement as the full instance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a full integrated circuit design is used to meet various system requirements, then the circuit can provide complete functionality, but unnecessary components are wasted leading to increased power consumption and resource waste

Engineering Contradiction:
Improvesystem compatibilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The integrated circuit is divided into multiple independently selectable functional blocks or modules. Each block can be individually enabled or disabled based on the specific system requirements, allowing the circuit to be configured as a full instance or partial instances without requiring custom design for each application.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A single integrated circuit design serves multiple system requirements through configurable functional blocks. The same circuit architecture can adapt to different applications by selectively activating appropriate blocks, eliminating the need for separate custom designs for each system while reducing power consumption by disabling unused functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If custom integrated circuit design is created for each system, then the circuit can be optimized for specific requirements, but the design and validation effort and cost increase significantly

Engineering Contradiction:
Improvesystem-specific optimizationVSAvoiddesign and validation effort
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The circuit is segmented into standardized functional blocks with well-defined interfaces. This segmentation allows systematic reconfiguration for different systems by combining different blocks in various configurations, reducing the complexity of custom design while maintaining system-specific optimization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The integrated circuit uses configurable parameters such as enable signals, selection lines, and switch matrices that can be adjusted to change the functional configuration. This allows the same physical circuit to be adapted to different system requirements by changing parameters rather than redesigning the entire circuit.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If all components are included in the integrated circuit, then complete functionality is provided, but the circuit area and manufacturing complexity increase

Engineering Contradiction:
Improvefunctional completenessVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The circuit is organized into discrete functional segments that can be selectively instantiated. This allows the circuit area to be reduced by omitting unused segments while maintaining the ability to provide complete functionality when all segments are activated, balancing reliability with area efficiency.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12321681B2Full die and partial die tape outs from common design
Publication Date: 2025.06.03 APPLE INC
  • US12321681B2 patent drawing
  • US12321681B2 patent drawing
  • US12321681B2 patent drawing

AI summary

A chip design methodology and a set of integrated circuits that are taped out from a common design database are disclosed. The area of a full instance of the integrated circuit is defined, and one or more chop lines are defined to identify portions that will be removed for one or more partial instances. A variety of techniques and mechanisms are defined to permit the tape outs to occur from a common design database, so that the effort to tape out partial instances may be minimized beyond that to tape out the full instance.