Partial ECC Update Scheme for Reduced Memory Write Bandwidth

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Solution Overview

Problem

Existing error correction systems in computer systems require significant bandwidth and memory access to update error correction codes (ECC) when data is modified, leading to inefficiency and high ECC overhead, especially when combining multiple data strings.

Innovation Solution

A system and method that allows for efficient updating of ECC by using an encoder unit to convert between different protection schemes, enabling partial updates of ECC without recalculating the entire ECC total, reducing bandwidth demand and ECC overhead through the use of HDL code and hardware design that supports protection scheme conversion and error checking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple data strings are combined to reduce ECC overhead percentage, then ECC overhead ratio decreases, but bandwidth demand and memory access increase when updating ECC

Engineering Contradiction:
ImproveECC overhead ratioVSAvoidbandwidth demand
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments the ECC update process by maintaining separate ECC values for individual cache ways (way0_ECC, way1_ECC, etc.) rather than requiring a single unified ECC recalculation. When a cache way is updated, only that specific way's ECC needs to be recalculated and XORed with the total, breaking the monolithic ECC update into smaller independent segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism using XOR operations to combine individual way ECC values into a total ECC value. This intermediary approach allows incremental updates where only changed ways need recalculation, and the new total ECC can be computed by XORing the updated way ECC with the previous total, avoiding full recalculation of all ways.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If ECC is calculated for every cache way separately, then bandwidth and power are saved during write operations, but ECC overhead ratio increases

Engineering Contradiction:
Improvebandwidth efficiencyVSAvoidECC overhead ratio
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent merges multiple individual way ECC values into a single total ECC value using XOR operations. This combining approach allows the system to maintain separate ECC protection for each cache way (saving bandwidth during writes) while presenting a unified ECC overhead structure to the memory system, effectively reducing the perceived overhead ratio.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal ECC structure that serves multiple functions: it provides individual way protection (enabling write-only operations), maintains a combined total ECC (reducing overhead ratio), and supports incremental updates (improving productivity). This multi-functional ECC system resolves the contradiction between overhead ratio and bandwidth efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If entire ECC is recalculated when any data portion is updated, then data integrity is maintained, but processing time and bandwidth consumption increase

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-calculating and storing individual ECC values for each cache way before they are needed for the total ECC calculation. When a cache way is updated, the new ECC value is immediately available for XOR operation with the total, eliminating the need for time-consuming recalculation of all other ways and maintaining data integrity efficiently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces dynamics to the ECC update process by enabling incremental updates based on which specific cache way changed. Instead of a static full recalculation approach, the system dynamically adjusts the update scope to only what is necessary (the changed way plus XOR with total), reducing processing time while maintaining reliability through selective recalculation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10866854B2System and method for reducing ECC overhead and memory access bandwidth
Publication Date: 2020.12.15 ARTERIS INC
  • US10866854B2 patent drawing
  • US10866854B2 patent drawing
  • US10866854B2 patent drawing

AI summary

A system, and corresponding method, is described for updating or calculating ECC where the transaction volume is significantly reduced from a read-modify-write to a write, which is more efficient and reduces demand on the data access bandwidth. The invention can be implemented in any chip, system, method, or HDL code that perform protection schemes and require ECC calculation, of any kind. Embodiments of the invention enable IPs that use different protections schemes to reduce power consumption and reduce bandwidth access to more efficiently communicate or exchange information.