Partial Erasing Management for Rewritable Non-Volatile Memory
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Solution Overview
Problem
Traditional partial erasure methods in rewritable non-volatile memory modules lack flexibility and have incomplete management mechanisms, leading to reduced system stability and inefficiency.
Innovation Solution
A partial erasing management method that performs sequential partial erasing and programming operations on physical regions within a physical erasing unit, updating status information to improve management efficiency and enable flexible use of physical regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional erasing operation is performed based on physical blocks, then the memory module maintains simple structure, but the flexibility in use is reduced
Solution Approach 1:
The patent divides the physical block into multiple physical regions (first physical region, second physical region, etc.) that can be independently erased and programmed. This segmentation enables flexible partial erasure operations while maintaining a relatively simple management structure by organizing the complexity into hierarchical regions rather than requiring complex block-level management.
2Adaptability or versatility
If partial erasure of physical blocks is supported, then flexibility is improved, but the management mechanism becomes incomplete and system stability is reduced
Solution Approach 1:
The patent implements a management mechanism that tracks and updates status information for each physical region after erasing and programming operations. This feedback mechanism ensures that the management information remains accurate and complete, thereby maintaining system stability while enabling flexible partial erasure operations.
3Productivity
If sequential physical regions are used based on preset order, then management efficiency is improved, but the flexibility to access any region is reduced
Solution Approach 1:
The patent combines sequential processing for management efficiency with dynamic address mapping that allows the system to access any physical region as needed. The management mechanism maintains a mapping between logical addresses and physical regions, enabling efficient sequential operations while preserving flexible access capabilities through the address translation mechanism.
Data Source
AI summary
A partial erasing management method, a memory storage device, and a memory control circuit unit are provided. The method includes: performing a first partial erasing operation on a first physical region among multiple physical regions in a first physical erasing unit to erase first data in the first physical region; after performing the first partial erasing operation on the first physical region, performing a first programming operation on the first physical region to store second data into the first physical region; and in response to at least one of the first partial erasing operation and the first programming operation, updating first status information related to the first physical region.