Partial Frame Buffer Processing for Multi-Panel DSI Displays

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Solution Overview

Problem

Existing graphics processing units (GPUs) face challenges in efficiently supporting multiple display panels with different content and resolutions using a single display serial interface, leading to frame drops and increased power consumption due to full-size frame buffer processing.

Innovation Solution

A novel design for partial display from a full-size frame buffer that allows dividing and scaling an image across multiple display panels, enabling them to show different contents with a single DSI interface at minimal cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If full-size frame buffer processing is used to support multiple display panels, then display content coverage is improved, but power consumption increases and frame drops occur

Engineering Contradiction:
Improvedisplay content coverageVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the frame buffer processing by dividing the display buffer into multiple portions, each corresponding to a specific display panel. The display processing unit selectively processes only the relevant portions needed for each panel rather than processing the entire frame buffer, thereby reducing power consumption while maintaining support for multiple panels with different content and resolutions

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If full-size frame buffer processing is used to support multiple display panels, then display content coverage is improved, but frame drops occur

Engineering Contradiction:
Improvedisplay content coverageVSAvoidframe stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the frame buffer processing by dividing the display buffer into multiple portions, each corresponding to a specific display panel. The display processing unit selectively processes only the relevant portions needed for each panel rather than processing the entire frame buffer, thereby reducing power consumption while maintaining support for multiple panels with different content and resolutions

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If multiple display panels with different resolutions are supported, then display versatility is improved, but processing complexity increases

Engineering Contradiction:
Improvedisplay panel compatibilityVSAvoidprocessing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by configuring the display processing unit to handle different processing parameters for different portions of the frame buffer. Each portion can be processed with resolution-specific settings appropriate for its target display panel, allowing the system to support multiple resolutions and panel types without requiring a completely separate processing path for each configuration

Inventive Principle:
Principle #3Local quality

4Device complexity

If a single DSI interface is used for multiple display panels, then device complexity is reduced, but display capability is limited

Engineering Contradiction:
Improveinterface quantityVSAvoiddisplay capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements multi-functionality by enabling a single display serial interface to drive multiple display panels with different resolutions and content requirements. The display processing unit dynamically configures the interface to handle different panel configurations, allowing one interface to perform the work of multiple specialized interfaces while maintaining full display capability across all panels

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12386575B2Methods and apparatus for partial display of frame buffers
Publication Date: 2025.08.12 QUALCOMM INC
  • US12386575B2 patent drawing
  • US12386575B2 patent drawing
  • US12386575B2 patent drawing

AI summary

The present disclosure relates to methods and apparatus for display processing. Aspects of the present disclosure can communicate an image to multiple display panels, where the multiple display panels include a first display panel and a second display panel. Further, aspects of the present disclosure can divide the image between the first display panel and the second display panel. Additionally, aspects of the present disclosure can scale at least one of a first portion of the image or a second portion of the image to at least one of the first display panel and the second display panel. Aspects of the present disclosure can also display at least one of the scaled first portion of the image or the scaled second portion of the image on at least one of the first display panel or the second display panel.