Partial Frame Distribution for High-Resolution Display Synchronization

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Solution Overview

Problem

Existing display systems face delays in displaying high-resolution images due to the need for all display apparatuses to have high processing performance, leading to increased circuit complexity and scale, and require complex timing control to synchronize displays.

Innovation Solution

A display system where a first display apparatus generates and sends partial frames to second display apparatuses, allowing the latter to select and display these frames based on predetermined orders, thereby reducing the processing performance required in the second apparatuses and simplifying their circuit configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If all display apparatuses have high processing performance to display high-resolution images, then the display timing is not delayed, but the circuit configuration becomes complex and large-scale

Engineering Contradiction:
Improvedisplay timing delayVSAvoidcircuit configuration complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The master display apparatus segments the image data into multiple partial frames and distributes them to different slave display apparatuses. This segmentation allows the processing load to be divided, enabling slave apparatuses with simpler circuits to handle specific portions of the overall display task without requiring high processing performance for the entire image.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple slave display apparatuses with simple circuit configurations are combined to collectively display high-resolution images. By merging their display capabilities, the system achieves high-resolution output without requiring each individual apparatus to have high processing performance, thus avoiding complex circuit configurations while maintaining display timing.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If all display apparatuses have high processing performance to avoid waiting for processing completion, then display timing is synchronized, but the scale and complexity of each apparatus increases

Engineering Contradiction:
Improveprocessing speedVSAvoidcircuit configuration scale
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The image processing task is segmented and distributed across multiple apparatuses. The master apparatus performs the complex processing of dividing image data into partial frames, while slave apparatuses only need to handle the simpler task of receiving and displaying their assigned partial frames. This segmentation enables high overall productivity without requiring each individual apparatus to have high processing performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The master display apparatus acts as an intermediary that performs the complex image processing and timing coordination. It prepares the partial frames in advance and distributes them to slave apparatuses, thereby mediating the processing load and timing synchronization requirements. This allows slave apparatuses to have simpler circuits while the system as a whole maintains high productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If complex timing control is implemented to synchronize display timings, then display synchronization is achieved, but the circuit configuration becomes more complex

Engineering Contradiction:
Improvedisplay synchronizationVSAvoidtiming control circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The master display apparatus performs preliminary actions by dividing the image data into partial frames and distributing them to slave apparatuses in advance of the display timing requirement. This preliminary preparation eliminates the need for complex real-time timing control at the slave apparatuses, as they simply need to display their assigned partial frames when received, achieving synchronization without complex timing circuits.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10652507B2Display system, image processing apparatus, and display method
Publication Date: 2020.05.12 SEIKO EPSON CORP
  • US10652507B2 patent drawing
  • US10652507B2 patent drawing
  • US10652507B2 patent drawing

AI summary

A projector includes a division processing section that generates a plurality of partial frames each containing at least part of a frame of source image data and an image output section that outputs the plurality of generated partial frames to downstream projectors in an order set in advance. The downstream projectors each include an image input section to which the plurality of generated partial frames are inputted from the higher-level projector and a control section that selects a partial frame to be displayed based on the input order of the partial frames inputted to the image input section and causes a display section to display the selected partial frame.