Partial Host Buffer Fetching for NVMe Storage Latency Reduction
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Solution Overview
Problem
Existing data transfer methods in data storage devices, such as NVMe, experience inefficiencies and latency due to the way host buffer fetching is handled, particularly in scenarios involving sequential write or read operations, where the device waits for host buffers to be available, leading to performance issues and quality of service (QoS) problems.
Innovation Solution
The data storage device parses and fetches physical region page (PRP) entries and/or scatter-gather list (SGL) entries, along with host buffer pointers, prior to scheduling commands, utilizing a controller with a host interface module, command scheduler, and initial buffer pointer fetcher to optimize buffer fetching based on device constraints and queue depth, thereby reducing latency and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the data storage device waits for host buffers to be available before executing commands, then data transfer reliability is improved, but data transfer speed and device productivity deteriorate due to latency and bubbles
Solution Approach 1:
The controller performs preliminary fetching of host buffer pointers (PRP/SGL entries) immediately upon receiving a command, before the command is scheduled for execution. This preliminary action ensures that buffer information is available in advance, eliminating waiting time and bubbles during command execution, thus resolving the contradiction between reliability and productivity
2Productivity
If the controller fetches all host buffers immediately upon receiving commands, then data transfer speed is improved, but device complexity and memory resource requirements worsen
Solution Approach 1:
The controller implements partial fetching by selectively fetching only the necessary number of PRP/SGL entries based on command characteristics and queue depth, rather than fetching all possible buffers. This partial action maintains high data transfer speed while avoiding excessive memory usage and controller complexity
3Productivity
If the controller fetches host buffer pointers prior to scheduling commands, then latency is reduced and productivity improves, but the complexity of buffer management and device complexity increase
Solution Approach 1:
The controller automatically manages the fetching and caching of PRP/SGL entries as part of its normal command processing workflow. The initial buffer pointer fetcher operates autonomously to fetch buffer information in the background, eliminating the need for complex external buffer management mechanisms while reducing latency and improving productivity
Data Source
AI summary
The present disclosure generally relates to improving data transfer in a data storage device. Not only prior to executing a command received from a host device, but even before scheduling the command, the data storage device parses the command and fetches physical region page (PRP) entries and/or scatter-gather list (SGL) entries. The fetching occurs just after receiving the command. Additionally, the host buffer pointers, which are described in PRP or SGL methods, associated with the entries are also fetched prior to scheduling the command. The fetching is a function of device constraints, queue depth, and/or tenant ID in a multi-tenant environment. The immediate fetching of at least part of the host buffers improves device performance, particularly in sequential write or read look ahead (RLA) scenarios.