Partial IC Compilation Using Imported Compile Data
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Solution Overview
Problem
The process of rolling a new software version for circuit designs requires recompiling designs for different programmable logic devices (PLDs), which can take days or weeks, causing significant delays due to the need for new compilations, especially when migrating from FPGA to ASIC or vice versa.
Innovation Solution
A method using two software programs to generate a compiled design for an integrated circuit (IC), where the first program compiles and migrates the design, and the second program imports compile information to perform partial compilation, allowing reuse of existing compilation data to reduce overall compilation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a new software version is rolled out for circuit design, then the design tool becomes more advanced and capable, but all designs must be recompiled which takes days or weeks causing production delays
Solution Approach 1:
The patent performs synthesis and analysis on the migrated design using the old software version before upgrading to the new version. This preliminary action prepares the design in advance, allowing the new software to import existing compile information and perform only partial compilation, thereby reducing the time loss from days or weeks to hours while still benefiting from the advanced capabilities of the new software version.
2Reliability
If complete recompilation is performed with new software version, then design compatibility and correctness are ensured, but compilation time increases significantly
Solution Approach 1:
The patent implements partial compilation by having the new software version import compile information from the old version and perform synthesis and analysis only on the migrated design. This partial action approach maintains design compatibility through verification while avoiding the excessive time cost of complete recompilation, thus preserving productivity.
Solution Approach 2:
The system uses feedback from the old software's compilation results to inform the new software's compilation process. The compile information imported from the old version serves as feedback that guides the partial compilation in the new version, ensuring compatibility is maintained while reducing redundant computation.
3Ease of manufacture
If migration from FPGA to ASIC is performed, then unit costs are reduced, but the compilation process must be repeated for different device types
Solution Approach 1:
The patent creates a companion revision that can be compiled for both FPGA and ASIC devices using the same synthesis and analysis process. The migrated design serves multiple purposes - it can be implemented on either device type without requiring separate compilation processes, thereby reducing the time loss while enabling cost-effective ASIC manufacturing.
4Adaptability or versatility
If design migration between FPGA and ASIC is performed, then design flexibility is improved, but compilation must be redone for each device type
Solution Approach 1:
The system performs preliminary synthesis and analysis on the migrated design with the old software version before device-specific compilation. This preliminary action creates a universal intermediate representation that can be efficiently compiled for either FPGA or ASIC, maintaining design flexibility while improving compilation throughput by avoiding redundant synthesis steps.
Data Source
AI summary
Methods, computer programs and systems for using two software programs to generate a compiled design for an integrated circuit (IC) are provided. The method compiles a first IC design using a first design program and then migrates the first IC design to a second IC design, still using the first design program. Additionally, the method performs synthesis and analysis on the second IC design, still using the first design program. A second design program is used to import compile information associated with the compiling of the first IC design and the synthesis and analysis of the second IC design. The second design program is also used to create a compiled design for the second IC based on the imported compile information.