Partial IC Reconfiguration CRC Update for SEU Error Detection

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Programmable integrated circuits (ICs) face challenges in detecting errors during partial reconfiguration due to single event upset (SEU) errors, where incorrect CRC values are generated when using wrong CRAM bits, leading to undetected configuration errors.

Innovation Solution

A method and circuit for calculating an updated CRC value by combining the first CRC value, second CRC value generated from partial and prior configuration data, and prior CRC value stored in the IC, ensuring accurate error detection in partially reconfigured ICs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dynamic CRC calculation is used based on updated CRAM bits, then reconfiguration speed is improved, but error detection capability deteriorates because incorrect CRC values cannot be detected

Engineering Contradiction:

Improvereconfiguration speedVSAvoiderror detection capability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent pre-calculates CRC values for all possible CRAM bit combinations before partial reconfiguration. These pre-calculated CRC values are stored and used to verify the correctness of updated CRAM bits after reconfiguration, enabling error detection without sacrificing reconfiguration speed

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent prepares correction data and pre-calculated CRC values in advance to cushion against potential SEU errors that may occur during or after partial reconfiguration. This allows the system to quickly detect and correct errors without compromising the fast reconfiguration process

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Productivity

If partial reconfiguration is performed using logic operations on existing CRAM values, then reconfiguration efficiency is improved, but susceptibility to SEU errors increases

Engineering Contradiction:

Improvereconfiguration efficiencyVSAvoidSEU error susceptibility

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent implements a feedback mechanism where pre-calculated CRC values and correction data are used to verify the correctness of CRAM bits after partial reconfiguration. If errors are detected through this feedback process, the system can initiate correction actions to restore proper configuration

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent introduces pre-calculated CRC values and correction data as intermediaries between the partial reconfiguration process and the final configuration verification. These intermediaries enable error detection and correction without interfering with the efficient logic operation-based reconfiguration process

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS8924818B1Partial reconfiguration and error detection in an integrated circuit

Publication Date: 2014.12.30 ALTERA CORP

AI summary

Techniques for reconfiguring an integrated circuit (IC) are provided. The techniques may improve error detection in the partially reconfigurable IC. A cyclic redundancy check (CRC) value for a first configuration data is received by the IC and a second configuration data is generated based on the first configuration data and a prior configuration data stored in the IC. The first configuration data may be a partial reconfiguration data that is used to reconfigure at least a portion of the IC. A third configuration data is then generated based on the first and second configuration data and the prior configuration data. A second CRC value is calculated based on the third configuration data. The second CRC value, together with the first CRC value and a prior CRC value stored in the IC, is used to calculate an updated CRC value. The updated CRC value is stored in the IC.