Partial Line-Based Probe Filters Bypass Cache Multicast Probes

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Solution Overview

Problem

The exponential growth of CPU cache size outpaces the capacity of line-based cache directories, leading to inefficiencies in tracking cache lines and increased multicast probes, while region-based probe filters lack precision in identifying cache line subscriptions.

Innovation Solution

Implementing a partial line-based probe filter with spare state encoding to indicate recently invalidated cache lines, allowing transactions to bypass multicast probes and efficiently manage cache array entries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a line-based cache directory scheme is used to track individual cache lines, then tracking precision is improved, but the directory size increases linearly with total cache capacity, failing to keep up with exponential cache growth

Engineering Contradiction:
Improvecache line tracking precisionVSAvoiddirectory size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the cache directory into region-based probe filters that track groups of cache lines (sectors) rather than individual lines. This segmentation allows the directory to scale with logarithmic complexity relative to cache capacity while maintaining adequate tracking precision through sector-level granularity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical dimension to the cache directory structure by combining region-based tracking (coarse granularity) with partial line-based probe filters (fine granularity for communication lines). This multi-dimensional approach allows efficient scaling while preserving precision where needed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If a region-based probe filter is used to track cache regions instead of individual lines, then directory size is reduced, but the ability to identify specific cache line subscriptions is lost

Engineering Contradiction:
Improvedirectory sizeVSAvoidcache line subscription identification
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies local quality by enhancing the region-based probe filter with partial line-based probe filters specifically for communication lines. This selective refinement provides precise subscription identification only where needed (for communication lines) while maintaining coarse-grained region tracking for other cache lines, optimizing the balance between directory size and tracking precision.

Inventive Principle:
Principle #3Local quality

3Productivity

If partial line-based probe filter entries are reclaimed upon invalidation to free space, then directory space utilization is improved, but subsequent accesses require multicast probes increasing latency

Engineering Contradiction:
Improvedirectory space utilizationVSAvoidaccess latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-allocating multiple probe filter entries for communication lines and maintaining them even after invalidation. This ensures that subsequent accesses can immediately determine subscription status without requiring multicast probes, thereby reducing access latency while maintaining efficient space utilization through controlled entry retention.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250217297A1Systems and methods for indicating recently invalidated cache lines
Publication Date: 2025.07.03 ADVANCED MICRO DEVICES INC
  • US20250217297A1 patent drawing
  • US20250217297A1 patent drawing
  • US20250217297A1 patent drawing

AI summary

A computing device includes detection circuitry configured to detect invalidation of a line of a cache array. The computing device additionally includes setting circuitry configured to set, in response to the detected invalidation, a spare state encoding in an entry of a partial line-based probe filter that indicates recent invalidation of the line of the cache array. The computing device also includes processing circuitry configured to process a transaction that hits on the entry of the partial line-based probe filter by avoiding a multicast probe of the cache array. Various other methods, systems, and computer-readable media are also disclosed.