Partial Lookup Table FFE for GDDR Memory Signal Integrity
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Solution Overview
Problem
Modern dynamic random-access memory (DRAM) systems, particularly GDDR memories, face challenges in maintaining high data transmission accuracy due to channel distortion and inter-symbol interference, which existing feed-forward equalization (FFE) and decision feedback equalization (DFE) methods struggle to fully address, especially in high-bandwidth applications like graphics processing.
Innovation Solution
The implementation of a reduced lookup table-based feed-forward equalization (FFE) circuit in a data processing system, which uses multiple partial lookup tables to apply a finite impulse-response (FIR) filter, allowing for non-linear compensation of signal distortions by indexing based on current and precursor/postcursor PAM symbol values, reducing memory requirements and improving equalization efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a full lookup table is used for FFE, then equalization accuracy is improved, but memory requirements and device complexity increase significantly
Solution Approach 1:
The patent divides the full lookup table into multiple partial lookup tables, each handling a specific subset of input combinations. This segmentation allows the system to achieve the same equalization accuracy as a full LUT while using significantly less memory, as each partial LUT only stores entries for its specific input range rather than all possible combinations.
Solution Approach 2:
The patent introduces a hierarchical structure with multiple levels of partial lookup tables, where each level processes different dimensions of the input space. By organizing the lookup operation in multiple dimensional steps rather than a single flat table, the system reduces memory requirements while maintaining comprehensive equalization coverage.
2Measurement precision
If a full lookup table is used for FFE, then equalization accuracy is improved, but device complexity increases
Solution Approach 1:
The patent segments the FFE computation into multiple stages, each using a separate partial lookup table. This segmentation reduces the complexity of any single table while maintaining the overall functionality, making the circuit more manageable and potentially more efficient in terms of logic depth and resource utilization.
3Quantity of substance
If multiple partial lookup tables are used, then memory requirements are reduced, but the number of operations and processing time may increase
Solution Approach 1:
The patent performs preliminary organization of data into multiple partial lookup tables during system initialization or training. This preliminary structuring allows for faster runtime operation by enabling parallel or pipelined access to different partial tables, reducing the overall processing time despite the increased number of tables.
Data Source
AI summary
A driver circuit includes a feed-forward equalization (FFE) circuit. The FFE circuit receives a plurality of pulse-amplitude modulation (PAM) symbol values to be transmitted at one of multiple PAM levels. The FFE circuit includes a first partial lookup table, one or more additional partial lookup tables, and an adder circuit. The first partial lookup table contains partial finite impulse-response (FIR) values and indexed based on a current PAM symbol value, a precursor PAM symbol value, and a postcursor PAM symbol value. The one or more additional partial lookup tables each contain partial FIR values and indexed based on a respective additional one or more of the PAM symbol values. The adder circuit adds results of lookups from the first partial lookup table and the additional partial lookup tables to produce an output value.