Partial Memory Channel Boot for Reduced BIOS Training Time

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Solution Overview

Problem

Current memory systems face challenges in reducing boot time and making it consistent, especially when dealing with multiple DIMMs, as the BIOS training process can be lengthy and unresponsive to users, affecting the user experience.

Innovation Solution

Implementing a method where the BIOS identifies a partially populated memory channel with the minimum number of DIMMs, trains only that channel during the initial boot, and then trains the remaining channels in parallel during the OS phase, allowing the system to remain responsive and reducing boot time significantly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the BIOS trains all memory channels during initial boot, then complete memory system functionality is achieved, but boot time becomes excessively long and system becomes unresponsive to users

Engineering Contradiction:
Improvememory system functionalityVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory training process is segmented into two phases: BIOS phase trains only a partial set of memory channels (minimum one channel), while the remaining channels are trained in the OS phase. This segmentation allows the system to achieve basic functionality quickly while completing full memory initialization asynchronously, resolving the contradiction between complete functionality and fast boot time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The BIOS performs preliminary memory training on a minimal sufficient set of channels before handing off to the OS. This preliminary action enables the system to become responsive to users immediately, while the remaining memory channels are trained in the background during OS initialization, maintaining both responsiveness and complete functionality.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the BIOS trains all memory channels during initial boot, then complete memory system functionality is achieved, but user experience deteriorates due to unresponsive system

Engineering Contradiction:
Improvememory system functionalityVSAvoiduser experience
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

Memory training is segmented between BIOS phase (partial channels) and OS phase (remaining channels). This allows the system to provide basic functionality immediately for user interaction, while completing full memory initialization in the background, thereby maintaining ease of operation without sacrificing reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The OS acts as an intermediary that takes over the memory training process from the BIOS. The BIOS performs initial training on minimal channels and then hands off to the OS, which completes the remaining training in the background. This intermediary approach allows the system to remain responsive to users while completing full memory initialization.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If the BIOS trains only a partial set of memory channels, then boot time is reduced and system remains responsive, but complete memory functionality is not initially achieved

Engineering Contradiction:
Improveboot timeVSAvoidmemory system functionality
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The BIOS performs preliminary training on a partial set of memory channels sufficient for basic system operation. This preliminary action reduces boot time and enables user interaction, while the OS completes the remaining memory channel training in the background, ensuring complete functionality is ultimately achieved without compromising initial boot performance.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11455261B2First boot with one memory channel
Publication Date: 2022.09.27 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US11455261B2 patent drawing
  • US11455261B2 patent drawing
  • US11455261B2 patent drawing

AI summary

An embodiment of a semiconductor package apparatus may include technology to identify a partial set of populated memory channels from a full set of populated memory channels of a multi-channel memory system, and complete a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system. Other embodiments are disclosed and claimed.