Partial Reconfiguration Register Initialization via Two-Bitstream Sequence

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Solution Overview

Problem

Integrated circuits (ICs) without native support for initial conditions in partial reconfiguration regions can lead to functional errors due to mismatch between synthesis and simulation, as the initial state of registers is undefined, causing unpredictable behavior and potential failures.

Innovation Solution

Emulating programmable initial conditions using a two-bitstream approach, where the first bitstream sets all registers to a known initial condition value, followed by a second bitstream that programs the actual design, ensuring registers are initialized correctly and functionally valid even on ICs that do not natively support initial conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If ICs are designed with area-savings designs that do not provide native support for initial conditions, then IC area efficiency is improved, but register initial state becomes undefined causing functional errors

Engineering Contradiction:
ImproveIC areaVSAvoidregister initial state
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies preliminary action by configuring registers to a default initial state (all zeros) before the main design functionality is activated. This is achieved through the bitstream configuration process where the LUT mask is initially set to drive all register inputs to zero, ensuring a known starting state before the actual design logic is programmed and activated.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If hardware support for initial conditions is added to registers, then register initial state reliability is improved, but IC area increases due to additional logic

Engineering Contradiction:
Improveregister initial stateVSAvoidIC area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements self-service by using the existing LUT (Look-Up Table) infrastructure and configuration mechanisms already present in the FPGA architecture to provide initial condition support. Rather than adding dedicated initial condition hardware, the system uses the programmable nature of existing LUTs to generate initial values, allowing the design to initialize registers without requiring additional specialized hardware circuits.

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If synthesis and simulation assume initial conditions are present, then design integrity is improved, but functional errors occur when implemented on ICs without native initial condition support

Engineering Contradiction:
Improvedesign integrityVSAvoidfunctional behavior
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies parameter changes by modifying the LUT mask parameter during the configuration process. The LUT mask is used to control the output values of LUTs, and by setting it to specific values during initialization, the system can force register inputs to predetermined states (such as all zeros). This parameter manipulation allows the hardware to behave as if native initial condition support is present, bridging the gap between synthesis assumptions and actual hardware behavior.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10394990B1Initial condition support for partial reconfiguration
Publication Date: 2019.08.27 ALTERA CORP
  • US10394990B1 patent drawing
  • US10394990B1 patent drawing
  • US10394990B1 patent drawing

AI summary

Devices and methods for initializing one or more registers of a programmable integrated circuit (IC) to store an initial condition value are provided. A first bitstream that programs the region of the IC to supply the initial condition value to the one or more registers is first programmed on the IC. Then, once the registers are initialized with the initial condition value, a second bitstream is subsequently programmed to the region of the IC to supply values associated with a function of the design to the one or more registers.