Partial Reconfiguration Routing in Integrated Circuits

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Solution Overview

Problem

Conventional routing techniques in integrated circuit devices face congestion and quality of result (QoR) degradation during partial reconfiguration due to limited routability to and from partition pin nodes, and sub-optimal pre-assigned partition pins leading to routability issues in both initial and re-implementation processes.

Innovation Solution

A method is described that involves reading a netlist for a circuit design with a reconfigurable module, defining regions for placement and routing, selectively removing partition pins, and generating a partial bitstream, allowing for flexible routing of drivers and loads within a larger region encompassing the reconfigurable module, thereby improving routability and QoR.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional routing techniques are used with partition pin selection for every boundary signal net routing, then routing can be performed with fixed boundary connections, but routing congestion and QoR degradation occur due to limited routability to and from partition pin nodes

Engineering Contradiction:
Improverouting stabilityVSAvoidroutability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies dynamics by making the partition pin selection adaptable rather than fixed. The routing system dynamically selects optimal partition pin nodes based on current routing conditions and constraints, allowing the boundary connections to be flexibly determined during the routing process rather than being predetermined. This resolves the contradiction by maintaining routing stability through systematic selection while improving routability through adaptive optimization.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of partition pin selection from a static, predetermined choice to a dynamic, optimization-based selection. By varying the selection criteria and evaluating multiple candidate nodes based on routing metrics, the system adapts the partition pin configuration to achieve better routing performance without compromising stability.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If partition pins are pre-assigned during placement for boundary nets, then initial implementation can proceed, but sub-optimal partition pin selection leads to routability issues and QoR degradation

Engineering Contradiction:
Improveimplementation speedVSAvoidrouting quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing partition pin selection and evaluation during the placement phase, preparing optimal boundary connection points before routing begins. This preliminary optimization ensures that when routing proceeds, the partition pins are already positioned to maximize routing quality, thus maintaining both implementation speed and routing precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical, fixed assignment of partition pins with an intelligent, optimization-based selection system. Instead of using predetermined or arbitrary pin assignments, the system evaluates multiple candidates and selects optimal nodes based on routing metrics, substituting rigid mechanical assignment with adaptive computational selection.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Stability of the object's composition

If the same boundary connection is used after carving out a reconfigurable module logic, then static routing nodes are preserved, but routing congestion occurs during re-implementation due to limited routability

Engineering Contradiction:
Improverouting structure stabilityVSAvoidre-implementation routability
Core Design Contradiction:
Stability of the object's compositionVSEase of operation

Solution Approach 1:

The patent applies dynamics by enabling re-selection of partition pin nodes during re-implementation of reconfigurable modules. Instead of being locked to the same boundary connections, the routing system can dynamically choose optimal partition pins based on the new module configuration and current routing conditions, maintaining structural stability while improving re-implementation routability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10558777B1Method of enabling a partial reconfiguration in an integrated circuit device
Publication Date: 2020.02.11 XILINX INC
  • US10558777B1 patent drawing
  • US10558777B1 patent drawing
  • US10558777B1 patent drawing

AI summary

A method of implementing a partial reconfiguration in an integrated circuit device is described. The method comprises reading a netlist for a design of a circuit comprising a reconfigurable module; defining a first region of the integrated circuit device having the reconfigurable module; defining a second region that encompasses the first region; placing the reconfigurable module of the design in the first region, wherein the reconfigurable module comprises a partition pin of a plurality of available partition pins; selectively removing the partition pin; routing drivers and loads that are in the second region; and generating a partial bitstream for the reconfigurable module.