Partial Reverse Concatenation for Tighter Storage Modulation Codes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional reverse concatenation schemes for data storage face challenges such as high implementation complexity, weakened modulation constraints, and inability to satisfy non-uniform constraints, particularly in product codes, which hinder their practical implementation in data storage systems like tape drives and optical storage.
Innovation Solution
The implementation of a partial reverse concatenated modulation code, where data is encoded using a C2 encoding scheme followed by modulation encoding and then C1 encoding, without reversing the order of error correction coding and modulation coding completely, allowing for simpler integration with existing architectures and tighter modulation constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional reverse concatenation is used to improve modulation code rate, then format efficiency improves, but implementation complexity increases significantly
Solution Approach 1:
The patent applies partial reverse concatenation by reversing the order of modulation coding and ECC decoding only for the data portion, while keeping the header processing in the conventional order. This partial application achieves the benefits of reverse concatenation (higher code rate 0.9951 vs 0.9697) without requiring complete architectural redesign, thus reducing implementation complexity while maintaining format efficiency improvements
2Adaptability or versatility
If C2 symbol insertion after modulation coding is performed to maintain compatibility, then backward compatibility is achieved, but modulation constraints are weakened
Solution Approach 1:
The patent segments the data stream into header and data portion, applying different encoding orders to each segment. The header is processed in conventional order (C2 then MC) to maintain compatibility, while the data portion uses reverse order (MC then C2) to maintain tight modulation constraints. This segmentation allows simultaneous achievement of backward compatibility and constraint maintenance
3Productivity
If complete reverse concatenation is implemented to achieve higher code rate, then modulation code rate improves, but the architecture requires complete overhaul
Solution Approach 1:
The patent implements partial reverse concatenation by applying the reversed encoding order (MC then C2) only to the data portion while keeping header processing conventional. This achieves the higher modulation code rate (0.9951 vs 0.9697) without requiring complete architectural overhaul, as the header processing path remains unchanged and can be integrated with existing systems
Data Source
AI summary
In one embodiment, a system includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to cause the processor to write, by the processor, data to a storage medium of a data storage system using a partial reverse concatenated modulation code. The partial reverse concatenated modulation code comprises encoding the data by applying a C2 encoding scheme prior to encoding the data by applying one or more modulation encoding schemes, followed by encoding the data by applying a C1 encoding scheme subsequent to the encoding of the data with the one or more modulation encoding schemes.