Partial Scrambling for Flash Memory Decorrelation
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Solution Overview
Problem
Modern NAND flash memories experience undesired programming effects due to strong coupling between adjacent wordlines, leading to read errors caused by specific data patterns, particularly in multi-bit cell arrays.
Innovation Solution
A method and apparatus that decorrelate data between adjacent memory cells by scrambling data in some cells and leaving others unscrambled, using a scrambler circuit to selectively scramble data for pairs of memory cells located on adjacent wordlines, reducing computational effort and RAM bus traffic by scrambling only half the data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data scrambling is applied to all memory cells to eliminate correlation, then programming effects are avoided, but computational effort and bandwidth consumption increase
Solution Approach 1:
The patent applies partial scrambling to only half of the memory cells in each wordline rather than scrambling all cells. This partial action is sufficient to break the correlation between adjacent wordlines because the unscrambled cells in one wordline are paired with scrambled cells in the adjacent wordline, achieving the desired decorrelation effect with reduced computational effort.
Solution Approach 2:
The patent segments the wordline into two parts: scrambled cells and unscrambled cells. This segmentation allows the system to achieve correlation reduction without processing every cell, thereby reducing the computational burden while maintaining effectiveness in preventing programming effects.
2Reliability
If data scrambling is applied to all memory cells to eliminate correlation, then programming effects are avoided, but RAM bus traffic increases
Solution Approach 1:
The patent reduces RAM bus traffic by performing scrambling operations on only half of the memory cells rather than all cells. This partial scrambling approach maintains the ability to prevent programming effects while significantly reducing the volume of data that must be transmitted over the RAM bus during the scrambling process.
Solution Approach 2:
By segmenting the data into scrambled and unscrambled portions, the patent reduces the quantity of data that needs to be processed and transmitted. The unscrambled cells bypass the scrambling process entirely, reducing RAM bus traffic while still achieving the necessary decorrelation effect through the scrambled cells.
3Use of energy by moving object
If selective scrambling is applied to half the data, then computational effort is reduced, but correlation between adjacent cells may not be fully eliminated
Solution Approach 1:
The patent demonstrates that partial scrambling of half the cells is sufficient to achieve the desired decorrelation effect. The key insight is that having half the cells scrambled and half unscrambled in an alternating pattern creates enough variation in the data patterns to break the correlation between adjacent wordlines, without requiring full scrambling of all cells.
Solution Approach 2:
The patent applies different properties to different cells within the same wordline: some cells are scrambled while others remain unscrambled. This local differentiation creates the necessary variation in data patterns across adjacent wordlines to eliminate correlation, while avoiding the computational cost of scrambling every cell uniformly.
Data Source
AI summary
Decorrelation is provided between data stored in respective pairs of adjacent memory cells in a plurality of bit lines of a flash memory. Each of the pairs of adjacent memory cells is located along a respective one of the bitlines and common to two adjacent wordlines. The decorrelation is achieved by storing scrambled data in at least one memory cell of each of the pairs of adjacent memory cells and storing unscrambled data in at least one memory cell of at least one of the pairs of adjacent memory cells.