Partial Sub-Block Erase for 3D Memory Read Disturbance
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Solution Overview
Problem
Memory systems, particularly 3D memory, suffer from read disturbance effects due to repeated read operations, leading to data integrity issues and unrecoverable damage in unprogrammed memory pages, especially as memory block size increases.
Innovation Solution
Implementing a two-stage erase process in memory systems, where a coarse erase is performed on the entire block followed by a fine erase on specific sub-blocks, allowing for the distribution of memory cell states to shift from a mixed state to an erased state, thereby reducing read disturbance and preventing damage from prolonged blank states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a full block erase operation is performed on the entire memory block, then all memory cells are reset to erased state, but the operation is time-consuming and reduces productivity
Solution Approach 1:
The memory block is divided into multiple sub-blocks, allowing the erase operation to be performed selectively on only those sub-blocks that require erasure rather than the entire block. This segmentation enables parallel processing and reduces the total number of cells that need to be erased in each operation, thereby improving productivity while maintaining data integrity through targeted erasure of affected areas.
2Reliability
If memory blocks are kept in unprogrammed (blank) state for extended periods, then read disturbance effects accumulate, but frequent erase operations increase wear and reduce lifespan
Solution Approach 1:
Instead of performing complete block erase operations that affect all sub-blocks, the system applies partial erasure only to the specific sub-blocks that have experienced read disturbance effects. This partial action approach eliminates the harmful effects on affected areas while avoiding unnecessary erase cycles on already clean sub-blocks, thereby extending memory block lifespan by conserving program/erase cycles.
3Reliability
If selective erase operations are performed on specific sub-blocks, then read disturbance effects are minimized, but the control complexity increases
Solution Approach 1:
The system applies different erasure treatments to different sub-blocks based on their individual states and needs. By identifying which specific sub-blocks require erasure and applying erase operations only to those areas, the system achieves local optimization of data integrity without requiring complex global control mechanisms. The controller tracks the state of each sub-block and applies erasure selectively, simplifying the overall control logic compared to uniform block-wide operations.
Data Source
Figure 1A~1B
Figure 1C
Figure 1D
AI summary
Methods, systems and apparatus including computer-readable mediums for partially erasing blocks in a memory system to increase reliability are provided. In one aspect, a memory system includes a memory having a plurality of blocks and a memory controller coupled to the memory. The memory controller is configured to: execute a first erase operation on a particular block in the memory, the particular block including multiple sub-blocks each having respective memory cells, one or more memory cells in the particular block being in one or more programmed states before the first erase operation, then execute a second erase operation on a first sub-block of the particular block such that first respective memory cells of the first sub-block are in an erased state after the second erase operation. The memory controller can be configured to not execute the second erase operation on the one or more other sub-blocks of the particular block.