Decoding Circuit Using Partial Syndromes for Low-Power ECC
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Solution Overview
Problem
Conventional error correction methods in data storage systems are inefficient and consume excessive power, particularly in large-capacity storage devices, necessitating improved error correction efficiency and reduced power consumption.
Innovation Solution
A method and decoding circuit that calculates error syndromes, determines coefficients for a roughly-estimated error locator polynomial, performs a Chien search, and includes a checking module to selectively utilize correction results, optimizing the error correction process by controlling the number of error syndrome calculation units and execution times to reduce power consumption and enhance efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional error correction methods are used in large-capacity storage devices, then error correction capability is maintained, but error correction efficiency deteriorates and power consumption increases
Solution Approach 1:
The patent segments the error correction process into two distinct phases: a rough correction phase using a reduced set of error syndrome calculation units (fewer than t units for a t-error correcting code) and a verification phase using checking operations. This segmentation allows the system to perform initial error correction with lower power consumption and then verify results, improving overall efficiency while maintaining correction capability.
Solution Approach 2:
The patent applies partial action by using only a subset of the full error syndrome calculation capability (s < t units instead of all t units) for the initial rough correction. This partial utilization reduces power consumption and processing time while still achieving sufficient correction for most error cases, with the checking phase providing verification and fallback capability.
2Measurement precision
If full error syndrome calculation units are used for t-error correction, then correction accuracy is maintained, but processing time increases
Solution Approach 1:
The patent divides the correction process into rough correction and verification stages. The rough correction stage uses fewer error syndrome calculation units (s < t) to quickly process and generate initial correction results, reducing processing time. The verification stage then checks these results to ensure accuracy, maintaining correction precision while significantly reducing overall processing time.
Solution Approach 2:
The patent performs preliminary rough correction using a reduced set of error syndrome calculation units before performing the final verification. This preliminary action handles the bulk of the correction work with lower computational resources, and the subsequent verification ensures accuracy, thereby reducing total processing time while maintaining correction precision.
3Reliability
If all coefficients of the error locator polynomial are calculated, then complete error localization is achieved, but computational complexity increases
Solution Approach 1:
The patent calculates only a subset of the error locator polynomial coefficients (s coefficients where s < t) rather than all t coefficients. This partial calculation reduces computational complexity and resource requirements while still achieving sufficient error localization for the rough correction phase. The checking phase provides verification to ensure reliability.
Data Source
AI summary
A method for decoding an error correction code and an associated decoding circuit are provided, where the method includes the steps of: calculating a set of error syndromes of the error correction code, where the error correction code is a t-error correcting code and has capability of correcting t errors, and a number s of the set of error syndromes is smaller than t; sequentially determining a set of coefficients within a plurality of coefficients of an error locator polynomial of the error correction code according to at least one portion of error syndromes within the set of error syndromes for building a roughly-estimated error locator polynomial; performing a Chien search to determine a plurality of roots of the roughly-estimated error locator polynomial; and performing at least one check operation to selectively utilize a correction result of the error correction code as a decoding result of the error correction code.