Partial TSV Plug Structure for Dense, Low-Stress Wafer Vias
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Solution Overview
Problem
Existing methods for creating through-substrate vias (TSVs) face challenges such as high aspect ratio requirements leading to costly processing, thermal expansion mismatches causing stress and wafer flexing, and limited connection density due to large electrical pads, which restrict their applicability in various scenarios.
Innovation Solution
A method involving the creation of a partial TSV plug on the front side of a substrate with a low aspect ratio, followed by etching from the back side to expose the plug, applying an insulator, and depositing conductive material to connect the plug to the substrate surface, minimizing thermal stress and optimizing connection density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a small TSV is created to connect through the finished wafer thickness, then the connection density is improved, but the aspect ratio becomes high requiring slower, more costly processing and specialized equipment
Solution Approach 1:
The TSV formation process is segmented into two distinct phases: front-side cavity formation with insulator application, and back-side etching to complete the via. This segmentation allows each phase to be optimized independently, enabling cost-effective processing while achieving high connection density through precise control of the etching parameters and insulator removal.
Solution Approach 2:
The insulator is applied to the front-side cavity walls before the back-side etching process. This preliminary action protects the cavity walls during etching and enables precise control of the via formation, allowing small-diameter TSVs to be created without requiring expensive specialized equipment while maintaining high connection density.
2Reliability
If a small TSV is completely filled with conductor material, then the conductive connection is ensured, but thermal expansion mismatch creates significant stresses at the interface
Solution Approach 1:
The TSV structure is designed with non-uniform conductor filling: the via is completely filled at the front side to ensure reliable conductive connection, while the back side is etched away to reduce or eliminate conductor material. This local quality variation reduces the overall volume of conductor material, thereby minimizing thermal expansion mismatch stresses at the interface while maintaining connection reliability where it is most needed.
Solution Approach 2:
Instead of completely filling the entire TSV length with conductor material, the process applies partial filling by etching away the back side of the via. This partial action reduces the conductor material volume sufficient to minimize thermal stress while maintaining adequate conductive connection for the application requirements.
3Manufacturing precision
If the TSV diameter varies between front and back sides (taper), then the connection is formed, but thermal expansion mismatch creates different conductor-to-wafer ratios at front and back faces causing wafer flexing
Solution Approach 1:
The conventional approach of forming a tapered via from front to back is inverted. Instead, the process creates a cylindrical via from the front side, then etches away the back side to create an undercut or inverted taper. This inversion compensates for the thermal expansion mismatch by creating a geometry where the conductor-to-wafer ratio is balanced, preventing wafer flexing while maintaining connection integrity.
4Ease of manufacture
If the wafer is made very thin (50-150 um) to accommodate existing TSV processes, then the TSV processing is feasible, but handling difficulties and processing constraints increase
Solution Approach 1:
The process parameters are changed to enable TSV formation in thicker wafers. By modifying the etching parameters, insulator thickness, and via dimensions, the process achieves successful TSV formation in wafers thicker than the conventional 50-150 um range. This parameter optimization eliminates the need for extreme wafer thinning, thereby improving wafer handling ease while maintaining processing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces processing costs, minimizes thermal stress, and increases connection density, making TSVs more versatile and economically viable for a wider range of applications.
Implementation Method 1
evenly thinning the wafer by removing material from the back side using a combination of mechanical grinding and chemical or plasma etching
Implementation Method 2
evenly thinning the wafer by removing material from the back side using a combination of mechanical grinding and chemical or plasma etching
Implementation Method 3
creating an insulator on the side walls of the cavity to separate the conductive TSV from the bulk wafer material
Implementation Method 4
A conductive material is deposited to connect the exposed, partial TSV plug to a surface on the back side of the substrate
Data Source
AI summary
A method is described including creating a partial through substrate via (TSV) plug in a front side of a wafer, the partial TSV plug having a front side and a back side, the back side of the partial TSV extending through the front side of the substrate. A cavity is etched in a back side of the wafer that exposes the back side of the partial TSV plug. An insulator is applied to the etched back side of the wafer. A back side of the partial TSV plug is exposed by removing one or more of a portion of the insulator and a liner. A conductive material is deposited to connect the exposed, back side of the partial TSV plug to a surface on the back side of the wafer.