Partial Wafer Dicing and Transfer Molding for Semiconductor Packages

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional encapsulated semiconductor packages are costly to produce and prone to manufacturing defects due to inefficiencies in the die picking and placement process, as well as shifting of individual dies during molding, leading to defective packages.

Innovation Solution

A method involving partial dicing of a wafer, followed by molding and subsequent complete dicing of the molded and partially diced wafer, which includes securing the wafer on a carrier using adhesive or vacuum mechanisms, and using a transfer molding process to encapsulate the diced wafer, thereby reducing production costs and defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional die picking and placement process is used, then individual dies can be placed on carrier, but production cost increases and manufacturing defects occur

Engineering Contradiction:
Improvemanufacturing costVSAvoidproduction efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The wafer is partially diced into segments that remain connected by connecting portions, allowing the segments to be molded together as a group rather than handling individual dies. This segmentation approach reduces handling complexity and manufacturing cost while maintaining production efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple adjacent dies are merged into a single molded unit by maintaining connecting portions between them during the molding process. This combining approach eliminates the need for individual die placement and reduces manufacturing defects associated with handling separate dies.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If individual dies are handled during molding, then each die can be positioned, but shifting occurs leading to defective packages

Engineering Contradiction:
Improvedie positioning accuracyVSAvoidpackage defect rate
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The wafer is partially diced in advance to create segments with connecting portions, which are then secured to the carrier before molding. This preliminary securing action prevents any shifting during the molding process, ensuring precise positioning and eliminating defects caused by die movement.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Connecting portions act as intermediaries that maintain the relative positions of adjacent dies throughout the molding process. These connecting structures serve as mediators that prevent shifting and ensure accurate positioning without requiring complex individual die placement mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If complete dicing is performed before molding, then individual dies are separated, but handling complexity and defects increase

Engineering Contradiction:
Improvedie handling easeVSAvoidmolding alignment precision
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

Instead of performing complete dicing, the process uses partial dicing that creates segments with remaining connecting portions. This partial action approach simplifies handling by reducing the number of completely separate pieces while maintaining enough connectivity to ensure proper molding alignment and reduce defects.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in lower production costs, faster production time, and a reduced number of defective packages by improving the efficiency of the die handling and molding processes.

Implementation Method 1

securing the wafer on a carrier using adhesive or vacuum mechanisms

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

securing the wafer on a carrier using adhesive or vacuum mechanisms

Methodology Applied
Scientific EffectVacuum: Vacuum

Implementation Method 3

using a transfer molding process to encapsulate the diced wafer

Methodology Applied
Scientific EffectCompression: Compression

Data Source

PatentUS10062611B2Encapsulated semiconductor package and method of manufacturing thereof
Publication Date: 2018.08.28 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US10062611B2 patent drawing
  • US10062611B2 patent drawing
  • US10062611B2 patent drawing

AI summary

Encapsulated semiconductor packages and methods of production thereof. As a non-limiting example, a semiconductor package may be produced by partially dicing a wafer, molding the partially diced wafer, and completely dicing the molded and partially diced wafer.