Partition Address Translation Engine for Memory Redirection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Computer systems face issues with unusable memory partitions, leading to incomplete functionality and potential loss in storage device sales, as existing technologies do not effectively redirect memory access commands to functional partitions without increasing die size or informing the user of faulty partitions.

Innovation Solution

Implementing a partition address translation engine that maps unusable memory partitions to replacement partitions, allowing for seamless redirection of memory access commands, thereby ensuring sequential access to all usable partitions without increasing manufacturing costs or user awareness of faulty partitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory partitions are tested and unusable partitions are identified, then reliability of memory access is improved, but device complexity increases due to the need for partition management mechanisms

Engineering Contradiction:
Improvememory access reliabilityVSAvoidpartition management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by testing and identifying unusable memory partitions during the manufacturing process before the device is shipped to customers. The partition address translation engine is pre-configured with mapping information that redirects access to unusable partitions to usable replacement partitions. This advance preparation ensures reliable memory access without requiring complex runtime detection or user intervention.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If redundant spare partitions are allocated to replace unusable partitions, then reliability is improved, but manufacturing cost and die size increase

Engineering Contradiction:
Improvememory partition reliabilityVSAvoidmemory partition quantity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies parameter changes by modifying the address parameter of memory access commands through the partition address translation engine. When a command addresses an unusable partition, the translation engine changes the address parameter to redirect access to a usable replacement partition. This allows existing memory partitions to be reused effectively without adding redundant spare partitions, thereby avoiding increased die size and manufacturing costs.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If unusable partitions are mapped to replacement partitions, then productivity of usable memory is improved, but device complexity increases due to address translation requirements

Engineering Contradiction:
Improveusable memory productivityVSAvoidaddress translation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary component called the partition address translation engine that sits between the host computing device and the memory partitions. This intermediary automatically translates address commands from the host, redirecting access away from unusable partitions to usable replacement partitions without requiring the host to be aware of the mapping. This intermediary approach improves usable memory productivity while containing complexity within the storage device rather than the host system.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10725933B2Method and apparatus for redirecting memory access commands sent to unusable memory partitions
Publication Date: 2020.07.28 INTEL CORP
  • US10725933B2 patent drawing
  • US10725933B2 patent drawing
  • US10725933B2 patent drawing

AI summary

In one embodiment, an apparatus comprises a plurality of memory partitions, each memory partition comprising an array of 3D crosspoint memory, and a storage device controller comprising a memory comprising memory cells to store addresses of replacement memory partitions and addresses of unusable memory partitions and a partition address translation engine coupled to the memory, the partition address translation engine comprising logic to determine whether to redirect a memory access command received from a host computing device to a replacement memory partition based on the contents of the memory.