Partitioned Circuit Hardening With Selective Majority Arbiters
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Solution Overview
Problem
Existing logic hardening techniques, such as Triple Modular Redundancy (TMR) and Selective TMR, are not suitable for high-reliability circuits like those in nuclear power plants due to high manufacturing costs and increased circuit surface area, especially because majority vote arbiters are expensive and lead to significant overhead.
Innovation Solution
A logic hardening technique by partitioning that optimizes the number of inserted arbiters by determining the reliability of sub-circuits and inserting arbiters only where necessary to maintain a set reliability level, reducing manufacturing costs and circuit area, using a process that scans gates successively and inserts arbiters to ensure a majority vote signal is delivered to complementary sub-circuits if initial reliability is below a setpoint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If majority vote arbiters are inserted into all gates to ensure high reliability, then circuit reliability is improved, but manufacturing cost and circuit surface area increase significantly
Solution Approach 1:
The invention divides the circuit into partitions based on radiation sensitivity analysis, inserting arbiters only at specific partition boundaries rather than uniformly across all gates. This segmentation approach maintains reliability where needed while reducing overall arbiter count and manufacturing overhead.
Solution Approach 2:
The invention applies different hardening strategies to different circuit regions based on their radiation sensitivity characteristics. Critical sub-circuits receive arbiter protection while less sensitive areas use simpler protection mechanisms, optimizing the balance between reliability and manufacturing cost.
2Reliability
If majority vote arbiters are inserted into all gates to ensure high reliability, then circuit reliability is improved, but circuit surface area increases significantly
Solution Approach 1:
By segmenting the circuit into partitions and selectively placing arbiters only at necessary partition boundaries, the invention significantly reduces the total surface area occupied by arbiters compared to universal arbiter insertion, while maintaining adequate reliability coverage.
3Device complexity
If selective TMR is applied to sensitive sub-circuits, then manufacturing cost is reduced, but reliability for high-reliability circuits is insufficient
Solution Approach 1:
The invention partitions the circuit and applies enhanced arbiter-based protection at partition boundaries, providing higher reliability than selective TMR alone while maintaining cost-effectiveness by avoiding universal arbiter insertion throughout the entire circuit.
Data Source
Figure 1~3
Figure 4A~4C
Figure 5~6B
AI summary
The method relates to a method for the radiation hardening of an electronic circuit by partitioning, said circuit including an odd number K of parallel branches connected to a same primary input I and each including a same series of N modules and N-1 nodes linking two consecutive modules, the K branches together forming a series of N-1 gates respectively consisting of parallel K nodes, and a primary arbiter forming a majority vote from the output signal of the K branches, the method being characterized in that it includes the following steps which are repeated for each one of the gates: determining a reliability of a subcircuit upstream from the gate consisting of the portions of the K branches located between the primary input and the gate, and the insertion of at least one arbiter at the gate forming a majority vote from the output signals of said portions of branches constituting the scanned subcircuit and outputting at least one majority signal to the respective inputs of an additional subcircuit formed by the branch portions downstream from the gate, if the reliability of the scanned subcircuit is less than a reliability set point.