Partitioned DAC Architecture for PLL Dynamic Range Tuning

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Solution Overview

Problem

Current digital-to-analog conversion techniques in wireless communication systems face challenges in achieving efficient and area-saving solutions for dynamic range and frequency tunability, particularly in phase-locked loops (PLLs) where DACs consume significant space and resources.

Innovation Solution

A partitioned digital-to-analog converter (DAC) system is implemented, utilizing two or more DACs to convert digital signals to analog signals in parallel, with one DAC focusing on low-frequency components and another on high-frequency components, allowing for reduced area consumption and dynamic range optimization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single high-performance DAC is used to achieve high dynamic range and frequency tunability, then conversion performance is improved, but area consumption increases

Engineering Contradiction:
Improvedynamic rangeVSAvoidDAC area consumption
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent divides the DAC functionality into multiple separate DACs, each handling specific frequency ranges (e.g., first DAC for low-frequency components, second DAC for high-frequency components). This segmentation allows each DAC to be optimized for its specific range, achieving high overall dynamic range while reducing the area each individual DAC occupies compared to a single comprehensive DAC.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If a single high-performance DAC is used to achieve frequency tunability, then conversion flexibility is improved, but area consumption increases

Engineering Contradiction:
Improvefrequency tunabilityVSAvoidDAC area consumption
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent segments the frequency tuning functionality across multiple DACs, where each DAC is responsible for specific frequency bands. This allows independent optimization and tuning of each DAC for its designated range, providing broad overall frequency tunability while minimizing the area required for each DAC unit.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If multiple DACs are used to reduce area consumption, then area efficiency is improved, but system complexity increases

Engineering Contradiction:
ImproveDAC area consumptionVSAvoidsystem complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the DAC system into multiple independent but coordinated units, each handling specific frequency ranges. This modular approach reduces overall area consumption while managing complexity through clear functional separation and standardized interfaces between the segmented DAC units.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10958279B1Partitioned digital-to-analog converter system
Publication Date: 2021.03.23 QUALCOMM INC
  • US10958279B1 patent drawing
  • US10958279B1 patent drawing
  • US10958279B1 patent drawing

AI summary

Certain aspects of the present disclosure provide apparatus and techniques for digital-to-analog conversion. One example apparatus generally includes a first digital-to-analog converter (DAC) having an input coupled to a digital input node of the apparatus, a second DAC, a digital processor coupled between the digital input node and an input of the second DAC, and a combiner coupled to the first DAC and the second DAC.